MC68HC908LK24CFQ Freescale Semiconductor, MC68HC908LK24CFQ Datasheet - Page 71
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MC68HC908LK24CFQ
Manufacturer Part Number
MC68HC908LK24CFQ
Description
IC MCU 24K FLASH 8MHZ SPI 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908LK24CFUE.pdf
(464 pages)
Specifications of MC68HC908LK24CFQ
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC908LK24CFQ
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC908LK24CFQ
Manufacturer:
FRE/MOT
Quantity:
20 000
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4.4 FLASH Control Register
MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
Address:
The FLASH control register (FLCR) controls FLASH program and erase
operations.
HVEN — High Voltage Enable Bit
MASS — Mass Erase Control Bit
ERASE — Erase Control Bit
PGM — Program Control Bit
Reset:
Read:
Write:
This read/write bit enables the charge pump to drive high voltages for
program and erase operations in the array. HVEN can only be set if
either PGM = 1 or ERASE = 1 and the proper sequence for program
or erase is followed.
This read/write bit configures the memory for mass erase operation or
block erase operation when the ERASE bit is set.
This read/write bit configures the memory for erase operation.
ERASE is interlocked with the PGM bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
This read/write bit configures the memory for program operation.
PGM is interlocked with the ERASE bit such that both bits cannot be
equal to 1 or set to 1 at the same time.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
1 = Mass Erase operation selected
0 = Block Erase operation selected
1 = Erase operation selected
0 = Erase operation not selected
1 = Program operation selected
0 = Program operation not selected
$FE08
Bit 7
0
0
Figure 4-2. FLASH Control Register (FLCR)
FLASH Memory (FLASH)
6
0
0
5
0
0
4
0
0
HVEN
3
0
MASS
FLASH Memory (FLASH)
2
0
FLASH Control Register
ERASE
1
0
Data Sheet
PGM
Bit 0
0
71
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