MC908GR48AMFAE Freescale Semiconductor, MC908GR48AMFAE Datasheet - Page 124
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MC908GR48AMFAE
Manufacturer Part Number
MC908GR48AMFAE
Description
IC MCU 8BIT 48K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR48AMFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR48AMFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Low-Power Modes
10.11 Serial Peripheral Interface Module (SPI)
10.11.1 Wait Mode
The serial peripheral interface (SPI) module remains active in wait mode. Any enabled CPU interrupt
request from the SPI module can bring the MCU out of wait mode.
If SPI module functions are not required during wait mode, reduce power consumption by disabling the
SPI module before executing the WAIT instruction.
10.11.2 Stop Mode
The SPI module is inactive in stop mode. The STOP instruction does not affect SPI register states. SPI
operation resumes after an external interrupt. If stop mode is exited by reset, any transfer in progress is
aborted, and the SPI is reset.
10.12 Timer Interface Module (TIM1 and TIM2)
10.12.1 Wait Mode
The timer interface modules (TIM) remain active in wait mode. Any enabled CPU interrupt request from
the TIM can bring the MCU out of wait mode.
If TIM functions are not required during wait mode, reduce power consumption by stopping the TIM before
executing the WAIT instruction.
10.12.2 Stop Mode
The TIM is inactive in stop mode. The STOP instruction does not affect register states or the state of the
TIM counter. TIM operation resumes when the MCU exits stop mode after an external interrupt.
10.13 Timebase Module (TBM)
10.13.1 Wait Mode
The timebase module (TBM) remains active after execution of the WAIT instruction. In wait mode, the
timebase register is not accessible by the CPU.
If the timebase functions are not required during wait mode, reduce the power consumption by stopping
the timebase before enabling the WAIT instruction.
10.13.2 Stop Mode
The timebase module may remain active after execution of the STOP instruction if the oscillator has been
enabled to operate during stop mode through the OSCENINSTOP bit in the CONFIG2 register. The
timebase module can be used in this mode to generate a periodic wakeup from stop mode.
If the oscillator has not been enabled to operate in stop mode, the timebase module will not be active
during stop mode. In stop mode, the timebase register is not accessible by the CPU.
If the timebase functions are not required during stop mode, reduce the power consumption by stopping
the timebase before enabling the STOP instruction.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
124
Freescale Semiconductor
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