MC908GR48AMFAE Freescale Semiconductor, MC908GR48AMFAE Datasheet - Page 131

• Manufacturer Part Number: MC908GR48AMFAE
• Description: IC MCU 8BIT 48K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR48AMFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 12
Input/Output (I/O) Ports
12.1 Introduction
Bidirectional input-output (I/O) pins form seven parallel ports. All I/O pins are programmable as inputs or
outputs. All individual bits within port A, port C, port D and port F are software configurable with pullup
devices if configured as input port bits. The pullup devices are automatically and dynamically disabled
when a port bit is switched to output mode.
12.2 Unused Pin Termination
Input pins and I/O port pins that are not used in the application must be terminated. This prevents excess
current caused by floating inputs, and enhances immunity during noise or transient events. Termination
methods include:
Never connect unused pins directly to V
Since some general-purpose I/O pins are not available on all packages, these pins must be terminated
as well. Either method 1 or 2 above are appropriate.
Freescale Semiconductor
Addr.
$0000
$0001
$0002
1. Configuring unused pins as outputs and driving high or low;
2. Configuring unused pins as inputs and enabling internal pull-ups;
3. Configuring unused pins as inputs and using external pull-up or pull-down resistors.
Register Name
Port C Data Register
Port A Data Register
Port B Data Register
See page 135.
See page 138.
See page 140.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
(PTC)
(PTA)
(PTB)
Figure 12-1. I/O Port Register Summary (Sheet 1 of 3)
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
PTA7
PTB7
Bit 7
1
DD
= Unimplemented
or V
PTA6
PTB6
PTC6
6
SS
.
PTA5
PTB5
PTC5
5
Unaffected by reset
Unaffected by reset
Unaffected by reset
PTA4
PTB4
PTC4
4
PTA3
PTB3
PTC3
3
PTC2
PTA2
PTB2
2
PTA1
PTB1
PTC1
1
PTA0
PTB0
PTC0
Bit 0
131