M30280F6HP#D3 Renesas Electronics America, M30280F6HP#D3 Datasheet - Page 225
M30280F6HP#D3
Manufacturer Part Number
M30280F6HP#D3
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30280F6HP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Figure 14.27 Transmission and Reception Timing in Master Mode (Internal Clock)
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6
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C
2
9
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B
14.1.4.1.1 Master (Internal Clock)
14.1.4.1.2 Slave (External Clock)
14.1.4.1 Clock Phase Setting Function
0
8
0
0
One of four combinations of transfer clock phases and polarities can be selected using the CKPH bit
in the U2SMR3 register and the CKPOL bit in the U2C0 register.
Make sure the transfer clock polarity and phase are the same for the master and slave to communi-
cate.
Figure 14.27 shows the transmission and reception timing in master (internal clock).
Figure 14.28 shows the transmission and reception timing (CKPH="0") in slave (external clock) while
Figure 14.29 shows the transmission and reception timing (CKPH="1") in slave (external clock).
Data input timing
Clock output
(CKPOL=0, CKPH=0)
Clock output
(CKPOL=1, CKPH=0)
Clock output
(CKPOL=0, CKPH=1)
Clock output
(CKPOL=1, CKPH=1)
Data output timing
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, 8
page 203
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14. Serial I/O
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