M30280F6HP#D3 Renesas Electronics America, M30280F6HP#D3 Datasheet - Page 420
M30280F6HP#D3
Manufacturer Part Number
M30280F6HP#D3
Description
MCU 3/5V 48K I-TEMP 80-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet
1.M30280F6HPU9.pdf
(425 pages)
Specifications of M30280F6HP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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2.00
1.11
Rev.
Jan., 07
Apr., 06
REVISION HISTORY
Date
19 to 21
11, 12
20, 21
Page
382
2, 3
2, 3
43
47
54
58
59
60
10
35
37
42
43
49
51
1
6
7
8
-
• Appendix 2.3 Difference between M16C/28 and M16C/29 Groups (T-ver./V-
Overview
• Table 1.1 and Table 1.2 Performance Outline of M16C/28 Group Information
• Table 1.10 Pin Description Description partially modified
Clock Generation Circuit
• Figure 7.1 Clock Generation Circuit Figure partially modified
• Figure 7.6 PCLKR Register and PM2 Register NOTE 4. partially modified
• 7.6.1 Normal Operation Mode Information partially modified
• Figure 7.11 State Transition to Stop Mode and Wait Mode Figure partially
• Figure 7.12 State Transition in Normal Mode Figure partially modified
• Table 7.5 Allowed Transition and Setting Table partially modified
M16C/28B added, word standardized: I
Overview
• 1.1 Features Description modified
• Tables 1.1 and 1.2 Performance Outline of M16C/28 Group Note 4 condition
• Table 1.3 Product List-M16C/28 Product code partially deleted
• Table 1.4 Product List-M16C/28B Normal-ver. newly added
• Figure 1.3 Product Numbering System modified
• Tables 1.5 to 1.8 Product Code Partially modified
• Figure 1.5 Pin Assignment (Top View) of 85-pin Package Note 4 added
• Table 1.7 Pin Characteristics for 85-Pin Package Field name partially modi-
• Table 1.10 Pin Description Description about I/O Ports modified
Reset
• Figure 5.4 Voltage Detection Circuit Block Partially modified
• Figure 5.6 D4INT Register Note 5 (3) and (4) are added
Processor Mode
• Figure 6.2 PM2 Register added
• Figure 6.3 Bus Block added
Clock Generation Circuit
• Figure 7.6 PM2 Register Note 5 Description partially added, notes 4 and 6
• Figure 7.8 Examples of Main Clock Connection Circuit Note 2 added
module, and CRC calculation in M16C/28 (Normal-ver.) changed
ver.) Information of CAN module changed
about option deleted
modified
for use of M16C/28B at f(BCLK) = 24 MHz added, performance description modi-
fied and some added
fied
modified
M16C/28 Group (M16C/28, M16C/28B) Hardware Manual
C-13
Description
Summary
2
C bus mode, CPU clock
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