C8051F531-IT Silicon Laboratories Inc, C8051F531-IT Datasheet - Page 196
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C8051F531-IT
Manufacturer Part Number
C8051F531-IT
Description
IC 8051 MCU 8K FLASH 20TSSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F53xr
Specifications of C8051F531-IT
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
336-1393
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F531-IT
Manufacturer:
SILICON
Quantity:
205
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C8051F52x/F52xA/F53x/F53xA
19.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the CIP-
51 system controller. These registers are used to exchange data with a module and configure the module's
mode of operation.
Table 19.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA capture/com-
pare module’s operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note that PCA0 interrupts must be globally enabled before individual CCFn interrupts are
recognized. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1. See
Figure 19.3 for details on the PCA interrupt configuration.
Table 19.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
196
PWM16 ECOM CAPP CAPN
X = Don’t Care
X
X
X
X
X
X
0
1
Timer Overflow
PCA Counter/
W
M
P
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 5)
PCA0CPMn
C
O
M
E
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
X
X
X
1
1
1
1
1
C
A
P
N
n
M
A
T
n
T
O
G
n
W
M
P
n
E
C
C
F
n
C
F
1
0
1
0
0
0
0
0
C
R
PCA0CN
C
C
F
2
C
C
F
1
Figure 19.3. PCA Interrupt Block Diagram
C
C
F
0
0
1
1
0
0
0
0
0
ECCF0
ECCF1
ECCF2
C
D
L
I
PCA0MD
MAT
C
P
S
2
X
X
X
0
0
0
1
1
C
P
S
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
TOG
0
0
0
0
1
1
0
0
Rev. 1.3
PWM ECCF
0
0
0
0
0
1
1
1
X
X
X
X
X
X
X
X
Capture triggered by positive edge on
CEXn
Capture triggered by negative edge on
CEXn
Capture triggered by transition on
CEXn
Software Timer
High Speed Output
Frequency Output
8-Bit Pulse Width Modulator
16-Bit Pulse Width Modulator
(EIE1.4)
EPCA0
Operation Mode
0
1
(IE.7)
EA
0
1
Interrupt
Priority
Decoder
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