C8051F531-IT Silicon Laboratories Inc, C8051F531-IT Datasheet - Page 4
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C8051F531-IT
Manufacturer Part Number
C8051F531-IT
Description
IC 8051 MCU 8K FLASH 20TSSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F53xr
Specifications of C8051F531-IT
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
336-1393
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F531-IT
Manufacturer:
SILICON
Quantity:
205
C8051F52x/F52xA/F53x/F53xA
9. Memory Organization and SFRs............................................................................. 92
10. Interrupt Handler.................................................................................................... 98
11. Reset Sources ...................................................................................................... 106
12. Flash Memory....................................................................................................... 112
13. Port Input/Output ................................................................................................. 119
14. Oscillators ............................................................................................................ 134
4
9.1. Program Memory............................................................................................... 92
9.2. Data Memory ..................................................................................................... 93
9.3. General Purpose Registers ............................................................................... 93
9.4. Bit Addressable Locations ................................................................................. 93
9.5. Stack
9.6. Special Function Registers................................................................................ 93
10.1. MCU Interrupt Sources and Vectors................................................................ 98
10.2. Interrupt Priorities ............................................................................................ 98
10.3. Interrupt Latency.............................................................................................. 98
10.4. Interrupt Register Descriptions ...................................................................... 100
10.5. External Interrupts ......................................................................................... 104
11.1. Power-On Reset ............................................................................................ 107
11.2. Power-Fail Reset / VDD Monitor ................................................................... 107
11.3. External Reset ............................................................................................... 109
11.4. Missing Clock Detector Reset ....................................................................... 109
11.5. Comparator Reset ......................................................................................... 109
11.6. PCA Watchdog Timer Reset ......................................................................... 110
11.7. Flash Error Reset .......................................................................................... 110
11.8. Software Reset .............................................................................................. 110
12.1. Programming The Flash Memory .................................................................. 112
12.2. Flash Write and Erase Guidelines ................................................................. 114
12.3. Non-volatile Data Storage ............................................................................. 116
12.4. Security Options ............................................................................................ 116
13.1. Priority Crossbar Decoder ............................................................................. 121
13.2. Port I/O Initialization ...................................................................................... 125
13.3. General Purpose Port I/O .............................................................................. 127
14.1. Programmable Internal Oscillator .................................................................. 134
14.2. External Oscillator Drive Circuit..................................................................... 138
8.3.2. Stop Mode................................................................................................. 90
8.3.3. Suspend Mode .......................................................................................... 90
12.1.1. Flash Lock and Key Functions .............................................................. 112
12.1.2. Flash Erase Procedure ......................................................................... 113
12.1.3. Flash Write Procedure .......................................................................... 113
12.2.1. V
12.2.2. PSWE Maintenance .............................................................................. 114
12.2.3. System Clock ........................................................................................ 115
14.1.1. Internal Oscillator Suspend Mode ......................................................... 135
14.2.1. Clocking Timers Directly Through the External Oscillator..................... 138
14.2.2. External Crystal Example...................................................................... 138
DD
............................................................................................................ 93
Maintenance and the V
Rev. 1.3
DD
monitor ................................................ 114