C8051F531-IT Silicon Laboratories Inc, C8051F531-IT Datasheet - Page 59
![IC 8051 MCU 8K FLASH 20TSSOP](/photos/12/46/124608/silicon_laboratories_inc-20-tssop_sml.jpg)
C8051F531-IT
Manufacturer Part Number
C8051F531-IT
Description
IC 8051 MCU 8K FLASH 20TSSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F53xr
Specifications of C8051F531-IT
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-TSSOP
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
336-1393
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F531-IT
Manufacturer:
SILICON
Quantity:
205
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4.3.5. Output Conversion Code
The registers ADC0H and ADC0L contain the high and low bytes of the output conversion code. When the
repeat count is set to 1, conversion codes are represented in 12-bit unsigned integer format and the output
conversion code is updated after each conversion. Inputs are measured from 0 to V
can be right-justified or left-justified, depending on the setting of the AD0LJST bit (ADC0CN.2). Unused
bits in the ADC0H and ADC0L registers are set to 0. Example codes are shown below for both right-justi-
fied and left-justified data.
When the ADC0 Repeat Count is greater than 1, the output conversion code represents the accumulated
result of the conversions performed and is updated after the last conversion in the series is finished. Sets
of 4, 8, or 16 consecutive samples can be accumulated and represented in unsigned integer format. The
repeat count can be selected using the AD0RPT bits in the ADC0CF register. The value must be right-jus-
tified (AD0LJST = “0”), and unused bits in the ADC0H and ADC0L registers are set to '0'. The following
example shows right-justified codes for repeat counts greater than 1. Notice that accumulating 2
is equivalent to left-shifting by n bit positions when all samples returned from the ADC have the same
value.
V
V
V
REF
REF
REF
V
V
V
Input Voltage
REF
REF
REF
Input Voltage
x 4095/4096
x 2048/4096
x 2047/4096
x 4095/4096
x 2048/4096
x 2047/4096
0
0
Repeat Count = 4
Right-Justified ADC0H:ADC0L
0x3FFC
0x1FFC
0x0000
0x2000
(AD0LJST = 0)
C8051F52x/F52xA/F53x/F53xA
0x0FFF
0x07FF
0x0800
0x0000
Rev. 1.3
Repeat Count = 8
0x7FF8
0x3FF8
0x4000
0x0000
Left-Justified ADC0H:ADC0L
(AD0LJST = 1)
Repeat Count = 16
0xFFF0
0x7FF0
0x8000
0x0000
REF
0xFFF0
0x7FF0
0x8000
0x0000
x 4095/4096. Data
n
samples
59
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