SAF-XC164LM-4F40F AA Infineon Technologies, SAF-XC164LM-4F40F AA Datasheet - Page 18
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SAF-XC164LM-4F40F AA
Manufacturer Part Number
SAF-XC164LM-4F40F AA
Description
IC MCU 16BIT 32KB FLASH TQFP64-8
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet
1.SAF-XC164LM-16F40F_BA.pdf
(61 pages)
Specifications of SAF-XC164LM-4F40F AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
47
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LFQFP
Packages
PG-LQFP-64
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
4.0 KByte
Program Memory
32.0 KByte
For Use With
MCBX167-NET - BOARD EVAL INFINEON CAN/ETHRNTMCBXC167-BASIC - BOARD EVAL BASIC INFINEON XC16X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
SAF-XC164LM-4F40FAACT
SAF-XC164LM-4F40FAACT
SAF-XC164LM-4F40FAAINCT
SAF-XC164LM-4F40FAACT
SAF-XC164LM-4F40FAAINCT
can consist of up to 16 word wide (R0 to R15) and/or byte wide (RL0, RH0, …, RL7, RH7)
so-called General Purpose Registers (GPRs).
The upper 256 bytes of the DPRAM are directly bit addressable. When used by a GPR,
any location in the DPRAM is bit addressable.
1024 bytes (2 × 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are word wide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the XC166 Family. Therefore, they should
either not be accessed, or written with zeros, to ensure upward compatibility.
Table 3
Address Area
Flash register space
Reserved (Acc. trap)
Reserved for PSRAM
Program SRAM
Reserved for pr. mem.
Program Flash
Reserved
Reserved
SFR area
Dual-Port RAM
Reserved for DPRAM
ESFR area
XSFR area
Reserved
Data SRAM
Reserved for DSRAM
Reserved
1) The areas marked with “<” are slightly smaller than indicated, see column “Notes”.
2) Not defined register locations return a trap code (1E9B
3) Depends on the respective derivative. See
Data Sheet
XC164LM Memory Map
Start Loc.
FF’F000
F8’0000
E0’0800
E0’0000
C2’0000
C0’0000
C0’0000
C0’0000
20’0000
01’0000
00’FE00
00’F600
00’F200
00’F000
00’E000
00’D000
00’C000
00’8000
00’0000
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Table 1 “XC164LM Derivative Synopsis” on Page
End Loc.
FF’FFFF
FF’FFFF
F7’FFFF
E0’07FF
DF’FFFF
C1’FFFF
C0’FFFF
C0’7FFF
BF’FFFF
1F’FFFF
00’FFFF
00’FDFF
00’F5FF
00’F1FF
00’EFFF
00’DFFF
00’CFFF
00’BFFF
00’7FFF
16
H
).
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Area Size
4 Kbytes
508 Kbytes
< 1.5 Mbytes Minus PSRAM
2 Kbytes
< 2 Mbytes
128 Kbytes
64 Kbytes
32 Kbytes
< 10 Mbytes
< 2 Mbytes
0.5 Kbyte
2 Kbytes
1 Kbyte
0.5 Kbyte
4 Kbytes
6 Kbytes
4 Kbytes
16 Kbytes
32 Kbytes
1)
Functional Description
Notes
2)
–
–
XC164LM-16F
Minus segment 0
–
–
–
–
–
–
3)
Minus Flash
XC164LM-8F
XC164LM-4F
–
–
Derivatives
V1.2, 2007-03
XC164LM
6.