SAK-XC866-4FRI BC Infineon Technologies, SAK-XC866-4FRI BC Datasheet - Page 69
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SAK-XC866-4FRI BC
Manufacturer Part Number
SAK-XC866-4FRI BC
Description
IC MCU 8BIT 16KB FLSH TSSOP-38-1
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet
1.SAF-XC866-2FRI_BC.pdf
(116 pages)
Specifications of SAK-XC866-4FRI BC
Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-TSSOP
For Use With
MCBXC866 - BOARD EVAL FOR INFINEON XC86X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SAK-XC866-4FRIBC
SAK-XC866-4FRIBCINTR
SAK-XC866-4FRIBCTR
SAK-XC866-4FRIBCTR
SAKXC8664FRIBCXT
SP000210680
SAK-XC866-4FRIBCINTR
SAK-XC866-4FRIBCTR
SAK-XC866-4FRIBCTR
SAKXC8664FRIBCXT
SP000210680
If the WDT is not serviced before the timer overflow, a system malfunction is assumed.
As a result, the WDT NMI is triggered (assert WDTTO) and the reset prewarning is
entered. The prewarning period lasts for 30
(assert WDTRST).
The WDT has a “programmable window boundary” which disallows any refresh during
the WDT’s count-up. A refresh during this window boundary constitutes an invalid
access to the WDT, causing the reset prewarning to be entered but without triggering the
WDT NMI. The system will still be reset after the prewarning period is over. The window
boundary is from 0000
00
After being serviced, the WDT continues counting up from the value (<WDTREL> * 2
The time period for an overflow of the WDT is programmable in two ways:
• the input frequency to the WDT can be selected to be either f
• the reload value WDTREL for the high byte of WDT can be programmed in register
The period, P
by the following formula:
If the Window-Boundary Refresh feature of the WDT is enabled, the period P
between servicing the WDT and the next overflow is shortened if WDTWINB is greater
than WDTREL, see
replacing WDTREL with WDTWINB. For this feature to be useful, WDTWINB should not
be smaller than WDTREL.
Figure 28
Data Sheet
H
WDTREL
.
WDT
WDT Timing Diagram
WDTWINB
FFFF
WDTREL
, between servicing the WDT and the next overflow can be determined
P
Figure
H
WDT
H
Count
to the value obtained from the concatenation of WDTWINB and
=
28. This period can be calculated using the same formula by
2
----------------------------------------------------------------------------------------------------- -
(
1
+
No refresh
WDTIN
allowed
×
6
65
)
×
H
f
(
Refresh allowed
PCLK
2
count, after which the system is reset
16
–
WDTREL
Functional Description
×
PCLK
2
8
)
/2 or f
time
PCLK
V1.2, 2007-10
/128
XC866
WDT
8
).