SAK-C161JC-LF CA Infineon Technologies, SAK-C161JC-LF CA Datasheet - Page 13
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SAK-C161JC-LF CA
Manufacturer Part Number
SAK-C161JC-LF CA
Description
IC MCU 16BIT 256KB TQFP-128-2
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAK-C161CS-LF_CA.pdf
(89 pages)
Specifications of SAK-C161JC-LF CA
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SLDM, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
93
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
128-LFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
SAKC161JCLFCA
SP000057699
SP000057699
Table 2
Symbol Pin
P3
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.10
P3.11
P3.12
P3.13
P3.15
Data Sheet
No.
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
Pin Definitions and Functions (cont’d)
Input
Outp.
IO
I
O
O
I/O
I
O
I
I
I
I
I/O
I/O
O
I/O
O
O
I/O
O
O
Function
Port 3 is a 15-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 3 outputs can be configured as push/
pull or open drain drivers. The input threshold of Port 3 is
selectable (TTL or special).
The following Port 3 pins also serve for alternate functions:
T0IN
TxD1
T6OUT
RxD1
CAPIN
T3OUT
T3EUD
T4IN
T3IN
T2IN
MRST
MTSR
TxD0
RxD0
BHE
WRH
SCLK
CLKOUT
FOUT
CAPCOM1 Timer T0 Count Input,
ASC1 Clock/Data Output (Async./Sync)
GPT2 Timer T6 Toggle Latch Output,
ASC1 Data Input (Async.) or Inp./Output (Sync.)
GPT2 Register CAPREL Capture Input
GPT1 Timer T3 Toggle Latch Output
GPT1 Timer T3 External Up/Down Control Input
GPT1 Timer T4 Count/Gate/Reload/Capture Inp
GPT1 Timer T3 Count/Gate Input
GPT1 Timer T2 Count/Gate/Reload/Capture Inp
SSC Master-Receive/Slave-Transmit Inp./Outp.
SSC Master-Transmit/Slave-Receive Outp./Inp.
ASC0 Clock/Data Output (Async./Sync.)
ASC0 Data Input (Async.) or Inp./Outp. (Sync.)
External Memory High Byte Enable Signal,
External Memory High Byte Write Strobe
SSC Master Clock Output / Slave Clock Input.
System Clock Output (= CPU Clock)
Programmable Frequency Output
9
C161CS/JC/JI-32R
C161CS/JC/JI-L
V3.0, 2001-01