ATMEGA32M1-AU Atmel, ATMEGA32M1-AU Datasheet - Page 22
![MPU AVR 32K FLASH 20MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32M1-AU
Manufacturer Part Number
ATMEGA32M1-AU
Description
MPU AVR 32K FLASH 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32M1-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32M1-AU
Manufacturer:
TYCO
Quantity:
210
- Current page: 22 of 341
- Download datasheet (6Mb)
7.7
7.7.1
7.7.2
7.7.3
22
Register Description
ATmega16M1/32M1/64M1
EEARH and EEARL – The EEPROM Address Registers
EEDR – The EEPROM Data Register
EECR – The EEPROM Control Register
• Bits 15:10 – Res: Reserved
These bits are reserved and will always read as zero.
• Bits 9:0 – EEAR[8:0]: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512B/1K/2K bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0
and 1023. The initial value of EEAR is undefined. A proper value must be written before the
EEPROM may be accessed.
• Bits 7:0 – EEDR[7:0]: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7:6 – Reserved Bits
These bits are reserved and will always read as zero.
• Bits 5:4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEWE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
EEAR7
EEDR7
R/W
R/W
15
R
X
R
–
7
0
7
–
0
7
0
EEAR6
EEDR6
R/W
R/W
14
–
6
R
0
X
R
6
–
0
6
0
EEAR5
EEPM1
EEDR5
R/W
R/W
R/W
13
R
X
–
5
0
5
X
5
0
EEAR4
EEPM0
EEDR4
R/W
R/W
12
R/W
R
–
4
0
X
X
4
4
0
EEAR3
EERIE
EEDR3
R/W
R/W
R/W
11
R
X
–
3
0
3
0
3
0
EEMWE
EEAR2
EEDR2
R/W
R/W
R/W
R/W
10
2
0
2
0
X
2
0
-
EEDR1
EEWE
EEAR9
EEAR1
R/W
R/W
R/W
R/W
1
X
X
1
0
9
1
0
Table 7-1 on page
EEAR8
EEAR0
EEDR0
EERE
R/W
R/W
R/W
R/W
0
0
X
X
8
0
0
0
8209D–AVR–11/10
EEARH
EEARL
EECR
EEDR
23.
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