ATMEGA32M1-AU Atmel, ATMEGA32M1-AU Datasheet - Page 232
![MPU AVR 32K FLASH 20MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32M1-AU
Manufacturer Part Number
ATMEGA32M1-AU
Description
MPU AVR 32K FLASH 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32M1-AU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32M1-AU
Manufacturer:
TYCO
Quantity:
210
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21.6.3
21.6.4
232
ATmega16M1/32M1/64M1
Offset Compensation Schemes
ADC Accuracy Definitions
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by shortening both differential inputs using the AMPxIS bit with both inputs unconnected
(see
1 Control and Status register” on page
register” on page
ment results. Using this kind of software based offset correction, offset on any channel can be
reduced below one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
Figure 21-10. Offset Error
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
• Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last
(at 0.5 LSB). Ideal value: 0 LSB
transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum).
Ideal value: 0 LSB
“AMP0CSR – Amplifier 0 Control and Status register” on page
Output Code
248). This offset residue can be then subtracted in software from the measure-
Offset
Error
248, and
“AMP1CSR – Amplifier 1 Control and Status
V
REF
Input Voltage
247,
n
-1.
“AMP1CSR – Amplifier
Ideal ADC
Actual ADC
REF
8209D–AVR–11/10
in 2
n
steps
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