CY8C3866PVI-070 Cypress Semiconductor Corp, CY8C3866PVI-070 Datasheet - Page 115

• Manufacturer Part Number: CY8C3866PVI-070
• Description: IC MCU 8BIT 64KB FLASH 48SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: PSOC™ 3 CY8C38xxr

Specifications of CY8C3866PVI-070

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 67MHz
• Number Of I /o: 25
• Eeprom Size: 2K x 8
• Core Processor: 8051
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 2x20b, D/A 4x8b
• Oscillator Type: Internal
• Peripherals: CapSense, DMA, LCD, POR, PWM, WDT
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Technology: CMOS
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: SSOP
• Screening Level: Industrial
• Pin Count: 48
• Mounting: Surface Mount
• Rad Hardened: No
• Processor Series: CY8C38
• Core: 8051
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART, USB
• Maximum Clock Frequency: 67 MHz
• Number Of Programmable I/os: 28 to 72
• Number Of Timers: 4
• Operating Supply Voltage: 0.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Controller Family/series: (8051) PSOC 3
• No. Of I/o's: 25
• Eeprom Memory Size: 2KB
• Ram Memory Size: 8KB
• Cpu Speed: 67MHz
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

11.6.4 External Crystal Oscillator
Table 11-84. ECO AC Specifications
11.6.5 External Clock Reference
Table 11-85. External Clock Reference AC Specifications
11.6.6 Phase-Locked Loop
Table 11-86. PLL DC Specifications
Table 11-87. PLL AC Specifications
Document Number: 001-11729 Rev. *R
F
I
Fpllin
Fpllout
Jperiod-rms Jitter (rms)
Notes
Parameter
Parameter
Parameter
DD
Parameter
56. This specification is guaranteed by testing the PLL across the specified range using the IMO as the source for the PLL.
57. PLL input divider, Q, must be set so that the input frequency is divided down to the intermediate frequency range. Value for Q ranges from 1 to 16.
58. Based on device characterization (Not production tested).
Crystal frequency range
External frequency range
Input duty cycle range
Input edge rate
PLL operating current
PLL input frequency
PLL intermediate frequency
PLL output frequency
Lock time at startup
[58]
Description
Description
Description
Description
[56]
[56]
[57]
Measured at V
V
In = 3 MHz, Out = 67 MHz
In = 3 MHz, Out = 24 MHz
Output of prescaler
IL
to V
[58]
IH
Conditions
Conditions
Conditions
Conditions
DDIO
/2
PSoC
Min
0.1
Min
30
0
Min
Min
4
24
–
–
1
1
–
–
®
3: CY8C38 Family
Typ
Typ
50
–
–
Typ
400
200
Typ
–
–
–
–
–
–
Data Sheet
Max
Max
33
70
25
–
Max
Max
250
250
48
67
Page 115 of 129
–
–
3
Units
Units
MHz
V/ns
MHz
Units
Units
MHz
MHz
MHz
%
µA
µA
µs
ps
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