MCF52258CVN66 Freescale Semiconductor, MCF52258CVN66 Datasheet - Page 31

MCU 32BIT COLDFIRE V2 144MAPBGA

MCF52258CVN66

Manufacturer Part Number
MCF52258CVN66
Description
MCU 32BIT COLDFIRE V2 144MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF5225xr
Datasheet

Specifications of MCF52258CVN66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
No. Of Timers
2
Embedded Interface Type
CAN, Ethernet, I2C, QSPI, UART, USB
Digital Ic Case Style
MAPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Electrical Characteristics
2.8
1
2
3
4
5
6
7
8
9
10
11
31
Clock Source Frequency Range of EXTAL Frequency Range
PLL reference frequency range
System frequency
Loss of reference frequency
Self clocked mode frequency
Crystal start-up time
EXTAL input high voltage
EXTAL input low voltage
PLL lock time
Duty cycle of reference
Frequency un-LOCK range
Frequency LOCK range
CLKOUT period jitter
On-chip oscillator frequency
• Crystal
• External
• External clock mode
• On-chip PLL frequency
• External reference
• External reference
• Peak-to-peak (clock edge to clock edge)
• Long term (averaged over 2 ms interval)
In external clock mode, it is possible to run the chip directly from an external clock source without enabling the PLL.
This value has been updated.
All internal registers retain data at 0 Hz.
Depending on packaging; see the orderable part number summary.
Loss of Reference Frequency is the reference frequency detected internally, which transitions the PLL into self clocked mode.
Self clocked mode frequency is the frequency at which the PLL operates when the reference frequency falls below f
default MFD/RFD settings.
This parameter is characterized before qualification rather than 100% tested.
Proper PC board layout procedures must be followed to achieve specifications.
This specification applies to the period required for the PLL to relock after changing the MFD frequency control bits in the
synthesizer control register (SYNCR).
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the PLL circuitry via V
for a given interval.
Based on slow system clock of 40 MHz measured at f
1
Clock Source Electrical Specifications
4,9
3
7, 8
4, 5, 10 ,11
4
Characteristic
5, 7
6
, measured at f
DDPLL
(V
Table 14. Oscillator and PLL Specifications
DD
MCF52259 ColdFire Microcontroller, Rev. 4
and V
and V
SYS
SSPLL
DDPLL
Max
and variation in crystal oscillator frequency increase the C
= 3.0 to 3.6 V, V
sys
max.
SS
Symbol
V
V
f
f
C
crystal
f
ref_pll
f
f
IHEXT
f
SCM
ILEXT
f
f
LOR
= V
t
t
f
LCK
t
oco
sys
ext
cst
lpll
UL
jitter
dc
SSPLL
= 0 V)
f
ref
–0.75
–1.5
7.84
Min
100
V
2.0
12
40
0
2
0
1
SS
/ 32
66.67 or 80
66.67 or 80
66.67 or 80
Freescale Semiconductor
25.0
1000
Max
10.0
0.75
8.16
3.0
500
0.1
0.8
1.5
.01
60
10
5
2
2
jitter
4
4
percentage
sys
% f
LOR
% f
% f
% f
MHz
MHz
MHz
MHz
MHz
Unit
.
kHz
ms
s
V
V
sys
ref
ref
ref
with

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