MCF52258CVN66 Freescale Semiconductor, MCF52258CVN66 Datasheet - Page 8

MCU 32BIT COLDFIRE V2 144MAPBGA

MCF52258CVN66

Manufacturer Part Number
MCF52258CVN66
Description
MCU 32BIT COLDFIRE V2 144MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF5225xr
Datasheet

Specifications of MCF52258CVN66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
No. Of Timers
2
Embedded Interface Type
CAN, Ethernet, I2C, QSPI, UART, USB
Digital Ic Case Style
MAPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Freescale Semiconductor
— Pre-divider capable of dividing the clock source frequency into the PLL reference frequency range
— System can be clocked from PLL or directly from crystal oscillator or relaxation oscillator
— Low power modes supported
— 2
Interrupt controller
— Uniquely programmable vectors for all interrupt sources
— Fully programmable level and priority for all peripheral interrupt sources
— Seven external interrupt signals with fixed level and priority
— Unique vector number for each interrupt source
— Ability to mask any individual interrupt source or all interrupt sources (global mask-all)
— Support for hardware and software interrupt acknowledge (IACK) cycles
— Combinatorial path to provide wake-up from low-power modes
DMA controller
— Four fully programmable channels
— Dual-address transfer support with 8-, 16-, and 32-bit data capability, along with support for 16-byte (432-bit)
— Source/destination address pointers that can increment or remain constant
— 24-bit byte transfer counter per channel
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle-steal support
— Software-programmable DMA requests for the UARTs (3) and 32-bit timers (4)
— Channel linking support
Reset
— Separate reset in and reset out signals
— Seven sources of reset:
— Status flag indication of source of last reset
Chip configuration module (CCM)
— System configuration during reset
— Selects one of six clock modes
— Configures output pad drive strength
— Unique part identification number and part revision number
General purpose I/O interface
— Up to 56 bits of general purpose I/O on 100-pin package
— Up to 96 bits of general purpose I/O on 144-pin package
— Bit manipulation supported via set/clear functions
— Programmable drive strengths
— Unused peripheral pins may be used as extra GPIO
JTAG support for system level board testing
burst transfers
– Power-on reset (POR)
– External
– Software
– Watchdog
– Loss of clock / loss of lock
– Low-voltage detection (LVD)
– JTAG
n
(0  n  15) low-power divider for extremely low frequency operation
MCF52259 ColdFire Microcontroller, Rev. 4
Family Configurations
8

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