MC9328MX21SCVK Freescale Semiconductor, MC9328MX21SCVK Datasheet - Page 51

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MC9328MX21SCVK

Manufacturer Part Number
MC9328MX21SCVK
Description
IC MCU I.MX21 266MHZ 289-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX21r
Datasheets

Specifications of MC9328MX21SCVK

Core Processor
ARM9
Core Size
32-Bit
Speed
266MHz
Connectivity
1-Wire, EBI/EMI, I²C, IrDA, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
192
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
1.45 V ~ 3.3 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-MAPBGA
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9328MX21SCVK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9328MX21SCVKR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Specifications
3.16
Synchronous Serial Interface
The transmit and receive sections of the SSI can be synchronous or asynchronous. In synchronous mode,
the transmitter and the receiver use a common clock and frame synchronization signal. In asynchronous
mode, the transmitter and receiver each have their own clock and frame synchronization signals.
Continuous or gated clock mode can be selected. In continuous mode, the clock runs continuously. In gated
clock mode, the clock functions only during transmission. The internal and external clock timing diagrams
are shown in
Figure 42
through
Figure
45.
Normal or network mode can also be selected. In normal mode, the SSI functions with one data word of
I/O per frame. In network mode, a frame can contain between 2 and 32 data words. Network mode is
typically used in star or ring-time division multiplex networks with other processors or codecs, allowing
interface to time division multiplexed networks without additional logic. Use of the gated clock is not
allowed in network mode. These distinctions result in the basic operating modes that allow the SSI to
communicate with a wide variety of devices.
The SSI can be connected to 4 set of ports, SAP, SSI1, SSI2 and SSI3.
1
CK Output
2
4
FS (bl) Output
6
8
FS (wl) Output
12
10
11
STXD Output
31
32
SRXD Input
Note: SRXD input in synchronous mode only.
Figure 42. SSI Transmitter Internal Clock Timing Diagram
MC9328MX21 Technical Data, Rev. 3.4
Freescale Semiconductor
51

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