MCF5282CVM66 Freescale Semiconductor, MCF5282CVM66 Datasheet - Page 41

IC MPU 512K 66MHZ 256-MAPBGA

MCF5282CVM66

Manufacturer Part Number
MCF5282CVM66
Description
IC MPU 512K 66MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVM66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
No. Of I/o's
150
Ram Memory Size
64KB
Cpu Speed
66.67MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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base address register (RAMBAR), and system control registers that include low-power and core watchdog
timer control.
1.1.3
The external interface module handles the transfer of information between the internal core and memory,
peripherals, or other processing elements in the external address space.
Programmable chip-select outputs provide signals to enable external memory and peripheral circuits,
providing all handshaking and timing signals for automatic wait-state insertion and data bus sizing.
Base memory address and block size are programmable, with some restrictions. For example, the starting
address must be on a boundary that is a multiple of the block size. Each chip select can be configured to
provide read and write enable signals suitable for use with most popular static RAMs and peripherals. Data
bus width (8-bit, 16-bit, or 32-bit) is programmable on all chip selects, and further decoding is available
for protection from user mode access or read-only access.
1.1.4
Programmable chip select outputs provide a glueless connection to external memory and peripheral
circuits, providing all handshaking and timing signals for automatic wait-state insertion and data bus
sizing.
1.1.5
The MCF5282 incorporates several low-power modes of operation which are entered under program
control and exited by several external trigger events. An integrated Power-On Reset (POR) circuit
monitors the input supply and forces an MCU reset as the supply voltage rises. The Low Voltage Detect
(LVD) section monitors the supply voltage and is configurable to force a reset or interrupt condition if it
falls below the LVD trip point. The RAM standby switch provides power to RAM when the supply voltage
is higher than the standby voltage. If the supply voltage to chip falls below the standby battery voltage, the
RAM is switched over to the standby supply.
1.1.6
All of the pins associated with the external bus interface may be used for several different functions. Their
primary function is to provide an external memory interface to access off-chip resources. When not used
for this function, all of the pins may be used as general-purpose digital I/O pins. In some cases, the pin
function is set by the operating mode, and the alternate pin functions are not supported.
The digital I/O pins on the MCF5282 are grouped into 8-bit ports. Some ports do not use all eight bits.
Each port has registers that configure, monitor, and control the port pins.
1.1.7
There are two interrupt controllers on the MCF5282, each of which can support up to 63 interrupt sources
for a total of 126. Each interrupt controller is organized as 7 levels with 9 interrupt sources per level. Each
interrupt source has a unique interrupt vector, and 56 of the 63 sources of a given controller provide a
programmable level [1-7] and priority within the level.
Freescale Semiconductor
External Interface Module (EIM)
Chip Select
Power Management
General Input/Output Ports
Interrupt Controllers (INTC0/INTC1)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Overview
1-9

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