SC16C752BIB48,151 NXP Semiconductors, SC16C752BIB48,151 Datasheet - Page 26

• Manufacturer Part Number: SC16C752BIB48,151
• Description: IC DUAL UART 64BYTE 48LQFP
• Manufacturer: NXP Semiconductors

Specifications of SC16C752BIB48,151

• Number Of Channels: 2, DUART
• Package / Case: 48-LFQFP
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Voltage: 2.25 V ~ 5.5 V
• Data Rate: 5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.25 V
• Supply Current: 4.5 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V or 3.3 V or 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935274411151; SC16C752BIB48-S; SC16C752BIB48-S

NXP Semiconductors
SC16C752B
Product data sheet
7.7 Modem Status Register (MSR)
This 8-bit register provides information about the current state of the control lines from the
mode, data set, or peripheral device to the processor. It also indicates when a control
input from the modem changes state.
per channel.
Table 15.
[1]
Bit
7
6
5
4
3
2
1
0
The primary inputs RIn, CDn, CTSn, DSRn are all active LOW, but their registered equivalents in the MSR
and MCR (in Loopback) registers are active HIGH.
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register bits description
All information provided in this document is subject to legal disclaimers.
Description
CD (active HIGH, logic 1)
during normal mode. During internal Loopback mode, it is equivalent to
MCR[3].
RI (active HIGH, logic 1)
normal mode. During internal Loopback mode, it is equivalent to MCR[2].
DSR (active HIGH, logic 1)
during normal mode. During Internal Loopback mode, it is equivalent MCR[0].
CTS (active HIGH, logic 1)
during normal mode. During internal Loopback mode, it is equivalent to
MCR[1].
ΔCD. Indicates that CDn input (or MCR[3] in Loopback mode) has changed
state. Cleared on a read.
ΔRI. Indicates that RIn input (or MCR[2] in Loopback mode) has changed
state from LOW to HIGH. Cleared on a read.
ΔDSR. Indicates that DSRn input (or MCR[0] in Loopback mode) has changed
state. Cleared on a read.
ΔCTS. Indicates that CTSn input (or MCR[1] in Loopback mode) has changed
state. Cleared on a read.
5 V, 2.2 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 6 — 30 November 2010
Table 15
[1]
[1]
. This bit is the complement of the RIn input during
[1]
[1]
. This bit is the complement of the CDn input
. This bit is the complement of the CTSn input
. This bit is the complement of the DSRn input
shows Modem Status Register bit settings
SC16C752B
© NXP B.V. 2010. All rights reserved.
26 of 47