73M1903C-EVM Maxim Integrated Products, 73M1903C-EVM Datasheet - Page 22

• Manufacturer Part Number: 73M1903C-EVM
• Description: BOARD DEMO 73M1903C WORLDWIDE
• Manufacturer: Maxim Integrated Products

Specifications of 73M1903C-EVM

• Main Purpose: Interface, Analog Front End (AFE)
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Embedded: -

73M1903C Data Sheet
6.2
Figure 7 shows the block diagram of the analog front end. The analog interface circuit uses differential
transmit and receive signals to and from the external circuitry.
The hybrid driver in the 73M1903C is capable of connecting directly, but not limited to, a transformer-
based Direct Access Arrangement (DAA). The hybrid driver is capable of driving the DAA’s line coupling
transformer and load impedance. The hybrid drivers can also drive high impedance loads without
modification.
An on-chip band gap voltage is used to provide an internal voltage reference and bias currents for the
analog receive and transmit channels. The reference derived from the bandgap, nominally 1.25 V, is
multiplied to 1.36 Volts and output at the VREF pin. Several voltage references, nominally 1.25 V, are
used in the analog circuits. The band gap and reference circuits are disabled after a chip reset since the
ENFE (Register00 bit7) is reset to a default state of zero. When ENFE=0, the band gap voltage and the
analog bias currents are disabled. In this case all of the analog circuits are powered down and draw less
than 5 μA of current.
A clock generator (CKGN) is used to create all of the non-overlapping phase clocks needed for the time
sampled switched-capacitor circuits, ASDM, DAC1, and TLPF. The CKGN input is 2 times the
analog/digital interface sample rate or 3.072 MHz clock for Fs=8 kHz.
22
TXAP2
TXAP1
TXAN1
TXAN2
RXAP
RXAN
VBG
Analog I/O
Hybrid Drivers
+ -
analb
MUX
OPSR
AMUX1
SE
L
SMFLT
Out
Bandgap
Low Pass
BGAP
Transmit
Filter
ANALOG
Anti-Alias Filter
Figure 7: Analog Block Diagram
TLPF
Clock Generator
AAF
CKGN
REGISTERS
phase clocks (1.536 MHz)
SFR
sck
Outn
Outp
phase clocks
(1.536 MHz)
(3.072 MHz)
Sigma-Delta
DAC
DAC
Modulator
1
Analog
ASDM
In
tbs
rbs
MUX
tbit
DIGITAL
1
MUX
rbi
1
t
Sigma-Delta
Decimating
CLKDIV
Modulator
Clocks
DDEC
DSDM
Digital
PLL/
Filter
15:0
15:0
Serial
Port
DS_1903C_033
Rev. 5.0