ATA5773-DK1 Atmel, ATA5773-DK1 Datasheet - Page 214

• Manufacturer Part Number: ATA5773-DK1
• Description: BOARD XMITTER FOR ATA5773 315MHZ
• Manufacturer: Atmel
• Type: Transmitterr

Specifications of ATA5773-DK1

• Frequency: 315MHz
• Maximum Frequency: 315 MHz
• Supply Voltage (max): 4 V
• Supply Voltage (min): 2 V
• Supply Current: 9 mA
• Product: RF Development Tools
• For Use With/related Products: ATA5773
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.1
9.2
214
Notes:
ARITHMETIC AND LOGIC INSTRUCTIONS
ADD
ADC
ADIW
SUB
SUBI
SBC
SBCI
SBIW
AND
ANDI
OR
ORI
EOR
COM
NEG
SBR
CBR
INC
DEC
TST
CLR
SER
BRANCH INSTRUCTIONS
RJMP
IJMP
RCALL
ICALL
RET
RETI
CPSE
CP
CPC
CPI
SBRC
SBRS
Mnemonics
0x0B (0x2B)
0x0A (0x2A)
Address
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Register Summary (Continued)
Instruction Set Summary
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVR
Atmel ATA5771/73/74
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only
Rd, Rr
Rd, Rr
Rdl,K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rdl,K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd
Rd
Rd,K
Rd,K
Rd
Rd
Rd
Rd
Rd
k
k
Rd,Rr
Rd,Rr
Rd,Rr
Rd,K
Rr, b
Rr, b
Operands
Reserved
Reserved
ADCSRA
ADCSRB
Reserved
Name
ADMUX
DIDR0
TIFR1
ACSR
ADCH
ADCL
PRR
Add two Registers
Add with Carry two Registers
Add Immediate to Word
Subtract two Registers
Subtract Constant from Register
Subtract with Carry two Registers
Subtract with Carry Constant from Reg.
Subtract Immediate from Word
Logical AND Registers
Logical AND Register and Constant
Logical OR Registers
Logical OR Register and Constant
Exclusive OR Registers
One’s Complement
Two’s Complement
Set Bit(s) in Register
Clear Bit(s) in Register
Increment
Decrement
Test for Zero or Minus
Clear Register
Set Register
Relative Jump
Indirect Jump to (Z)
Indirect Call to (Z)
Subroutine Return
Compare, Skip if Equal
Compare
Compare with Carry
Compare Register with Immediate
Skip if Bit in Register Cleared
Skip if Bit in Register is Set
Relative Subroutine Call
Interrupt Return
ADC7D
REFS1
Bit 7
ADEN
ACD
BIN
–
–
REFS0
ADC6D
Bit 6
ACBG
ACME
ADSC
–
–
Description
ADATE
ADC5D
Bit 5
MUX5
ICF1
ACO
–
–
ADC Data Register High Byte
ADC Data Register Low Byte
ADLAR
ADC4D
Bit 4
MUX4
ADIF
ACI
–
–
–
–
–
PRTIM1
ADC3D
Bit 3
MUX3
ACIE
ADIE
–
–
Rd
Rd
Rdh:Rdl
Rd
Rd
Rd
Rd
Rdh:Rdl
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
PC
PC
PC
PC
PC
PC
if (Rd = Rr) PC
Rd Rr
Rd Rr C
Rd K
if (Rr(b)=0) PC
if (Rr(b)=1) PC
Rd + Rr
Rd + Rr + C
Rd - Rr
Rd - K
Rd - Rr - C
Rd - K - C
Rd
Rd v Rr
Rd
0xFF Rd
0x00 Rd
Rd v K
Rd
Rd + 1
Rd 1
Rd
0xFF
Rd
Rd v K
Z
PC + k + 1
Z
STACK
STACK
PC + k + 1
Rd
Rdh:Rdl + K
Rdh:Rdl - K
(0xFF - K)
Rd
Rr
K
Rr
Rd
PRTIM0
OCF1B
ADPS2
ADTS2
ADC2D
Bit 2
MUX2
ACIC
PC + 2 or 3
PC + 2 or 3
Operation
PC + 2 or 3
OCF1A
ADPS1
ADTS1
ADC1D
PRUSI
Bit 1
ACIS1
MUX1
PRADC
ADPS0
ADC0D
ADTS0
Bit 0
ACIS0
MUX0
TOV1
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,H
Z,C,N,V,S
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,C,N,V
Z,C,N,V,H
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
Z,N,V
None
None
None
None
None
None
I
None
Z, N,V,C,H
Z, N,V,C,H
Z, N,V,C,H
None
None
®
Flags
s, the CBI and SBI
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