AMMP-6530-TR1 Avago Technologies US Inc., AMMP-6530-TR1 Datasheet - Page 9

• Manufacturer Part Number: AMMP-6530-TR1
• Description: IC MMIC REJECT MXR 5-30GHZ 8-SMD
• Manufacturer: Avago Technologies US Inc.
• Series: AMMP-6530r

Specifications of AMMP-6530-TR1

• Frequency: 5GHz ~ 30GHz
• Function: Mixer
• Rf Type: ISM; DBS; VSAT; 802.16/WiMax; WLL; MMDS
• Package / Case: 8-QFN
• Rf Ic Case Style: SMD
• No. Of Pins: 8
• Operating Temperature Range: -55°C To +125°C
• Frequency Max: 30GHz
• Ic Function: Image Reject Mixer
• Termination Type: SMD
• Supply Voltage Max: 0V
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Digital Ic Case Style: SMD
• Gain Typ, V/v: -10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Recommended SMT Attachment for 5x5 Package
Figure 24a. Suggested PCB Land Pattern and Stencil Layout
Recommended SMT Attachment
The AMMP Packaged Devices are compatible with high
volume surface mount PCB assembly processes.
The PCB material and mounting pattern, as defined in
the data sheet, optimizes RF performance and is strongly
recommended. An electronic drawing of the land pattern
is available upon request from Avago Sales & Application
Engineering.
Figure 24b. Stencil Outline Drawing (mm)
9
Stencil Design Guidelines
A properly designed solder screen or stencil is required
to ensure optimum amount of solder paste is deposited
onto the PCB pads. The recommended stencil layout is
shown in Figure 24b. The stencil has a solder paste de-
position opening approximately 70% to 90% of the PCB
pad. Reducing stencil opening can potentially generate
more voids underneath. On the other hand, stencil
openings larger than 100% will lead to excessive solder
paste smear or bridging across the I/O pads. Considering
the fact that solder paste thickness will directly affect the
quality of the solder joint, a good choice is to use a laser
cut stencil composed of 0.127 mm (5 mils) thick stainless
steel which is capable of producing the required fine
stencil outline. The combined PCB and stencil layout is
shown in Figure 24c.
Figure 24c. Combined PCB and Stencil Layouts