MC33596FCER2 Freescale Semiconductor, MC33596FCER2 Datasheet - Page 37

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MC33596FCER2

Manufacturer Part Number
MC33596FCER2
Description
IC RX UHF PLL TUNED 32-QFN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC33596FCER2

Frequency
304, 315, 426, 434, 868 & 915MHz
Sensitivity
-104dBm
Data Rate - Maximum
22.4 kBaud
Modulation Or Protocol
FSK, OOK
Applications
General Data Transfer
Current - Receiving
10.3mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.7 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Values in
AFF[1:0] (Average Filter Frequency) define the average filter cut-off frequency if the AFFC bit is set.
If AFFC is reset, the average filter frequency is directly defined by bits DR[1:0], as shown in
If AFFC is set, AFF[1:0] allow the overall receiver sensitivity to be improved by reducing the average
filter cut-off frequency. The typical preamble duration of three Manchester zeroes or ones at the data rate
must then be increased, as shown in
16.2 Command Register
Figure 27
Freescale Semiconductor
Table 11
describes the Command register, COMMAND.
assume the LNA gain is not reduced by the AGC.
ILA1
Table 13. Minimum Number of Manchester Symbols in Preamble
0
0
1
1
AFF[1:0]
AFF1
ILA0
0
0
1
1
Table 12. Average Filter Cut-off Frequency
0
1
0
1
Table 11. RF Input Level Attenuation
Table
AFF0
versus DR[1:0] and AFF[1:0]
0
1
0
1
MC33596 Data Sheet, Rev. 4
00
01
10
11
13.
RF Input Level
Attenuation
00
3
16 dB
30 dB
0 dB
8 dB
Average Filter Cut-off
Frequency
0.5 kHz
01
1 kHz
2 kHz
4 kHz
6
3
DR[1:0]
10
12
6
3
See Parameter
Number
2.5
2.6
2.7
2.8
11
24
12
6
3
Register Description
Table
10.
37

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