SI4322-A1-FT Silicon Laboratories Inc, SI4322-A1-FT Datasheet - Page 15

• Manufacturer Part Number: SI4322-A1-FT
• Description: IC RCVR FSK 915MHZ 3.8V 16-TSSOP
• Manufacturer: Silicon Laboratories Inc
• Type: FSK Receiverr

Specifications of SI4322-A1-FT

• Package / Case: 16-TSSOP
• Frequency: 868MHz, 915MHz
• Sensitivity: -104dBm
• Data Rate - Maximum: 256 kbps
• Modulation Or Protocol: FSK
• Applications: Remote Control, RKE, Security Systems
• Current - Receiving: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Features: RSSI Equipped
• Voltage - Supply: 2.2 V ~ 3.8 V
• Operating Frequency: 915 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Current: 12 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Memory Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed
• Other names: 336-1628-5

5.2. Control Commands
Note: In the following tables the POR column shows the default values of the command registers after power-on.
10
12
13
14
11
1
2
3
4
5
6
7
8
9
Configuration Setting Command Receiving band, low battery detector,
Extended Wake-up Timer Com-
Extended Features Command
Frequency Setting Command
and Clock Divider Command
Synchron Pattern Command
Receiver Setting Command
Low Duty-Cycle Command
Wake-up Timer Command
FIFO Settings Command
AFC Control Command
Status Read Command
Low Battery Detector
Data Filter Command
Data Rate Command
Control Word
mand
FIFO IT level, FIFO start control, FIFO
wake-up timer, crystal oscillator, load
capacitance, baseband filter bandwidth,
clock output buffer
Frequency of the local oscillator
VDI source, LNA gain, RSSI threshold,
enable receiver
Synchron pattern
Wake-up time period
Wake-up time period extended adjust-
ment
Enable and set low duty-cycle mode
Microcontroller clock division ratio, low
frequency oscillator enable, LBD thresh-
old voltage
AFC parameters
Clock recovery parameters, auto-sleep
mode, data filter type, auto wake-up, DQD
threshold
Bit rate
enable and FIFO fill enable
Clock tail, wake-up auto calibration, PLL
bandwidth, long FIFO IT level
Receiver status read
Related Parameters/Functions
Rev. 1.2
b1 to b0, eb, et, ex, x3 to x0, i2
d1 to d0, g1 to g0, r2 to r0, en
ctls, dcal, bw1 to bw0, f5 to f4
a1 to a0, rl1 to rl0, st, fi, oe,
al, ml, dsfi, sf, ewi, f2 to f0
cd2 to cd0, elfc, t3 to t0
Related Control Bits
f3 to f0, s1 to s0, ff, fe
c1 to c0, m13 to m8
r3 to r0, m7 to m0
d6 to d0, enldc
cs, r6 to r0
to i0, dc
f11 to f0
b7 to b0
aen
Si4322
15