SI4322-A1-FT Silicon Laboratories Inc, SI4322-A1-FT Datasheet - Page 17

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SI4322-A1-FT

Manufacturer Part Number
SI4322-A1-FT
Description
IC RCVR FSK 915MHZ 3.8V 16-TSSOP
Manufacturer
Silicon Laboratories Inc
Type
FSK Receiverr
Datasheets

Specifications of SI4322-A1-FT

Package / Case
16-TSSOP
Frequency
868MHz, 915MHz
Sensitivity
-104dBm
Data Rate - Maximum
256 kbps
Modulation Or Protocol
FSK
Applications
Remote Control, RKE, Security Systems
Current - Receiving
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
2.2 V ~ 3.8 V
Operating Frequency
915 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Current
12 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Memory Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
336-1628-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4322-A1-FT
Manufacturer:
INTERSIL
Quantity:
747
Bit 7:4 <x3 : x0>: Crystal load capacitance. Set according to the crystal’s specified load capacitance.
Bit 3:1 <i2 : i0>: Baseband filter bandwidth
Bit 0 <dc>: When dc bit is set it disables the clock output.
Note: The internal 32 kHz oscillator is turned on by setting the elfc bit in the "5.10. Low Battery Detector and Microcontroller
Clock Divider Command" on page 21 or the enldc bit in the "5.9. Low Duty Cycle Command" on page 20 or by enabling
the low battery detector using eb bit or by turning on the wake-up timer (et bit) in this command.
Clock tail feature: When the clock output (pin 8) used to provide clock signal for the microcontroller (dc bit is set to 0), it
is possible to use the clock tail feature. This means that the crystal oscillator turn off is delayed, after issuing the com-
mand (clearing the ex bit) 512 more clock pulses are provided. This ensures that the microcontroller can switch itself to
low power consumption mode. It is possible to decrease the clock tail length to 128 pulses by clearing the ctls bit in
"5.15. Extended Features Command" on page 26.
x3
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
x2
0
0
0
0
1
1
……
i1
0
0
1
1
0
0
1
1
x1
0
0
1
1
1
1
i0
0
1
0
1
0
1
0
1
Rev. 1.2
x0
0
1
0
1
0
1
Bandwidth [kHz]
Capacitance [pF]
Baseband
Reserved
Reserved
Reserved
Crystal Load
400
340
270
200
135
10.0
15.5
16.0
8.5
9.0
9.5
….
Si4322
17

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