AT86RF212-ZU Atmel, AT86RF212-ZU Datasheet - Page 73

• Manufacturer Part Number: AT86RF212-ZU
• Description: IC TXRX ZIGBE/802.15.4/ISM 32QFN
• Manufacturer: Atmel

Specifications of AT86RF212-ZU

• Frequency: 700MHz, 800MHz, 900MHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, ISM
• Applications: ISM, ZigBee™
• Power - Output: 10dBm
• Sensitivity: -110dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 9.2mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 769 MHz to 935 MHz
• Interface Type: SPI
• Noise Figure: 7 dB
• Output Power: 21 dB
• Operating Supply Voltage: 1.8 V, 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: OQPSK
• Protocol Supported: 802.15.4
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.2.2 Handling of Reserved Frame Types
6.2.3 Register Description
8168C-MCU Wireless-02/10
Reserved frame types (as described in section 5.2.3.3) are treated according to bits
AACK_UPLD_RES_FT and AACK_FLTR_RES_FT of register 0x17 (XAH_CTRL_1)
with three options:
1. AACK_UPLD_RES_FT = 1, AACK_FLTR_RES_FT = 0:
2. AACK_UPLD_RES_FT = 1, AACK_FLTR_RES_FT = 1:
3. AACK_UPLD_RES_FT = 0
Register 0x17 (XAH_CTRL_1):
The XAH_CTRL_1 register is a control register for Extended Operating Mode.
Table 6-7. Register 0x17 (XAH_CTRL_1)
• Bit 7 – Reserved
• Bit 6 – CSMA_LBT_MODE
Refer to section 6.7.3.
• Bit 5 – AACK_FLTR_RES_FT
This register bit shall only be set if AACK_UPLD_RES_FT = 1.
If AACK_FLTR_RES_FT = 1, any frame with a reserved frame type is treated by the
RX_AACK
AACK_FLTR_RES_FT = 0, the received reserved frame is only checked for a valid
FCS. See section 6.2.2 for details.
• Bit 4 – AACK_UPLD_RES_FT
If AACK_UPLD_RES_FT = 1, received frames which are identified as reserved frames
will not be blocked. See section 6.2.2 for details.
• Bit 3 – Reserved
• Bit 2 – AACK_ACK_TIME
Refer to sections 5.2.3.3 and 5.2.6.
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
Frames of reserved frame type with correct FCS are indicated by the interrupt IRQ_3
(TRX_END). No further frame filtering is applied on these frames. Interrupt IRQ_5
(AMI) is never generated and no acknowledgment is sent.
If AACK_FLTR_RES_FT = 1, any frame with a reserved frame type is treated by the
RX_AACK Frame Filter as an IEEE 802.15.4 compliant data frame. This implies the
generation of the interrupt IRQ_5 (AMI) upon address matches.
Any frame with a reserved frame type is blocked.
Frame
7
Reserved
R/W
0
3
Reserved
R
0
Filter
as
6
CSMA_LBT_MODE
R/W
0
2
AACK_ACK_TIME
R/W
0
an
IEEE
802.15.4
5
AACK_FLTR_RES_FT
R/W
0
1
AACK_PROM_MODE
R/W
0
compliant
AT86RF212
4
AACK_UPLD_RES_FT
R/W
0
0
Reserved
R
0
data
frame.
73
If