XE1205I074TRLF Semtech, XE1205I074TRLF Datasheet - Page 11

• Manufacturer Part Number: XE1205I074TRLF
• Description: IC TXRX 433/868/915MHZ 48-VQFN
• Manufacturer: Semtech

Specifications of XE1205I074TRLF

• Frequency: 180MHz Center
• Data Rate - Maximum: 152.3kbps
• Modulation Or Protocol: FSK
• Applications: AMR, ISM, Home Automation, Process Control
• Power - Output: 0 ~ 15dBm
• Sensitivity: -121dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 14mA
• Current - Transmitting: 62mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN
• Receiving Current: 14mA
• Transmitting Current: 62mA
• Data Rate: 4.8Kbps
• Modulation Type: FSK
• Rf Ic Case Style: VQFN
• No. Of Pins: 48
• Supply Voltage Range: 2.4V To 3.6V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: XE1205I074TR

where OSR(7:0) is the content of the register; TParam_OSR(7:0) as described in section 7.2.8.
For a correct operation of the bit synchronizer, the value of this register must be higher or equal to 15 and
(int(OSR)+1) * Bit_rate should be inferior or equal to 4.87MHz.
5.2.3.3
In receive mode this feature is activated by setting the RXParam_Pattern configuration register bit to high. The
demodulated signal is compared with a pattern stored in the Reg_pattern(31:0) registers. The PATTERN signal (mapped
to output pin IRQ_0) is driven by the output of this comparator and is synchronized by DCLK. It is set to high when a
matching condition is detected, otherwise set to low. PATTERN output is updated at the rising edge of DCLK. The
number of bits used for comparison is defined in the RXParam_Psize(1:0) register and the number of tolerated errors for
the pattern recognition is defined in the RXParam_Ptol(1:0) register. Figure 4, illustrates the pattern matching process.
Note: The pattern recognizer is available only if the bit synchronizer is enabled.
5.2.3.4
This function provides a Received Signal Strength Indication based on the signal level at the output of the base-band
filter. To activate this function, the bit RXParam_RSSI must be set to “1”. When activated, the 2-bit status information is
stored in register RXParam_RSSI_OUT(1:0) and may be read through the serial control interface. The meaning of this
status information is given in the table below, where V
when the receiver is operated in mode A. The thresholds VTHRi are at the output of the base-band filter divided by the
gain between the input of the receiver and this output. When operated in mode B, equivalent VTHRi thresholds are
shifted 15dBm higher.
The operating range of the RSSI measurement may be changed by programming the RXParam_RSSI_range bit; in this
way two ranges with three VTHRi values may be selected. An additional way to increase RSSI operating range is to
combine modes A and B thresholds. One could then cover input signals ranging from -110dBm (VTHR1, low range,
mode A) up to -70dBm (VTHR3, high range, mode B)
© Semtech 2008
DCLK
DATA
(NRZ)
PATTERN
Pattern recognition block in continuous mode
RSSI in continuous mode
Reg_pattern[x]
Bit N-x =
RXPARAM_RSSI_out(1:0)
0 0
0 1
1 0
1 1
Reg_pattern[1]
Figure 4: Pattern matching operation.
Table 7: RSSI status description
Bit N-1 =
RFFIL
Reg_pattern[0]
Description
V
VTHR1 < V
VTHR2 < V
VTHR3 < V
RFFIL
11
is the differential amplitude of the equivalent input RF signal
Bit N =
≤ VTHR1
RFFIL
RFFIL
RFFIL
≤ VTHR2
≤ VTHR3
XE1205
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