LMX9830SM/NOPB National Semiconductor, LMX9830SM/NOPB Datasheet - Page 22
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LMX9830SM/NOPB
Manufacturer Part Number
LMX9830SM/NOPB
Description
IC SRL PORT MOD BLUETOOTH 60FBGA
Manufacturer
National Semiconductor
Datasheet
1.LMX9830SMNOPB.pdf
(46 pages)
Specifications of LMX9830SM/NOPB
Frequency
2.4GHz
Data Rate - Maximum
704kbps
Modulation Or Protocol
Bluetooth v2.0, Class 2
Applications
PDA's, POS Terminals
Power - Output
0dBm
Sensitivity
-80dBm
Voltage - Supply
2.5 V ~ 3.6 V
Current - Receiving
65mA
Current - Transmitting
65mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 125°C
Package / Case
60-FBGA
Physical Interfaces
UART
Data Rate
704Kbps
Operating Temperature Range
-40°C To +125°C
Msl
MSL 4 - 72 Hours
Supply Voltage Range
1.6V To 3.6V
Frequency Max
2480MHz
Termination Type
SMD
Rohs Compliant
Yes
Filter Terminals
SMD
Frequency Min
2402MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
*LMX9830SM
*LMX9830SM/NOPB
LMX9830SM
*LMX9830SM/NOPB
LMX9830SM
www.national.com
External Reference Clock Frequency (Note 39)
Frequency Tolerance (over full operating temperature and aging)
Crystal Serial Resistance
External Reference Clock Power Swing, pk to pk
Aging
10.7.4 ESR (Equivalent Series Resistance)
LMX9830 can operate with a wide range of crystals with dif-
ferent ESR ratings. Reference Table 21 and Figure 9 for more
details.
Note 39: Supported frequencies from external oscillator (in MHz): 10.00, 10.368, 12.00, 12.60, 12.80, 13.00, 13.824, 14.40, 15.36, 16.00, 16.20, 16.80, 19.20,
19.68, 19.80
10.8 ANTENNA MATCHING AND FRONT-END FILTERING
Figure 10 shows the recommended component layout to be
used between RF output and antenna input. Allows for ver-
satility in the design such that the match to the antenna maybe
improved and/or the blocking margin increased by addition of
a LC filter. Refer to antenna application note for further details.
Parameter
FIGURE 9. ESR vs. Load Capacitance for the Crystal Circuit
TABLE 21. System Clock Requirements
22
Min
100
-20
10
FIGURE 10. Front End Layout
Typ
±15
200
13
Max
+20
230
400
±1
20
ppm per year
20180018
Unit
MHz
ppm
mV
20180017
Ω