AT86RF230-ZUR Atmel, AT86RF230-ZUR Datasheet - Page 62

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AT86RF230-ZUR

Manufacturer Part Number
AT86RF230-ZUR
Description
TXRX LOW POWER 2.4GHZ 32VQFN
Manufacturer
Atmel
Datasheet

Specifications of AT86RF230-ZUR

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Applications
Industrial Monitoring and Control, Wireless Alarm and Security Systems
Power - Output
-17dBm ~ 3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
15.5mA
Current - Transmitting
16.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
2405 MHz to 2480 MHz
Interface Type
SPI
Noise Figure
6 dB
Output Power
20 dB
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
16.5 mA
Minimum Operating Temperature
- 40 C
Modulation
OQPSK
Protocol Supported
802.15.4
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT86RF230-ZUR
Manufacturer:
ATMEL
Quantity:
1 000
Company:
Part Number:
AT86RF230-ZUR
Quantity:
34 000
9.4 Voltage Regulators (AVREG, DVREG)
9.4.1 Overview
62
AT86RF230
the SPI transfer rate shall be lower than 250 Kbit/s to ensure no TRX_UR interrupt
occurs.
Note, during the Frame Buffer read access the TRX_UR interrupt is first valid 64 µs
after the RX_START interrupt. The occurrence of the interrupt can be disregarded when
reading the first byte of the Frame Buffer between 32 µs and 64 µs after the
RX_START interrupt.
If a received frame upload is delayed and during the upload process a new frame is
received, a TRX_UR and an RX_START interrupt occurs. Even so, the old frame data
can be read, if the SPI data rate is higher than the effective over air data rate. A
minimum SPI clock rate of 1 MHz is recommended in this special case. Finally it is
required to check the uploaded frame data integrity by a FCS using the microcontroller.
When writing data to the Frame Buffer during frame transmission, the SPI transfer rate
shall be higher than 250 Kbit/s to ensure no TRX_UR interrupt occurs. The first byte of
the PSDU data must be available in the Frame Buffer before SFD transmission has
been completed, which takes 176 µs (16 µs PA ramp up + 128 µs preamble
transmission + 32 µs SFD transmission) from the rising edge of SLP_TR pin (see
Figure 7-2).
The main features of the Voltage Regulator modules are:
• Bandgap stabilized 1.8V supply for analog and digital domain.
• Low dropout (LDO) voltage regulator
• Configurable for usage of external voltage regulator
The internal voltage regulators supply the low voltage domains of the AT86RF230. The
AVREG provides the regulated 1.8V supply voltage for the analog section and the
DVREG supplies the 1.8V supply voltage for the digital section. A simplified schematic
of the internal voltage regulator is shown in Figure 9-2.
Figure 9-2. Simplified Schematic of AVREG/DVREG
reference
Bandgap
voltage
1.25V
DEVDD / EVDD
DVDD / AVDD
5131E-MCU Wireless-02/09

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