ATMEGA128RFA1-ZUR Atmel, ATMEGA128RFA1-ZUR Datasheet - Page 102
ATMEGA128RFA1-ZUR
Manufacturer Part Number
ATMEGA128RFA1-ZUR
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA128-16AU.pdf
(385 pages)
2.ATAVR128RFA1-EK1.pdf
(13 pages)
3.ATAVR128RFA1-EK1.pdf
(555 pages)
Specifications of ATMEGA128RFA1-ZUR
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
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9.12.2 AES_STATUS – AES Status Register
102
ATmega128RFA1
This register controls the operation of the security module. Do not access this register
during AES operation to read the AES core status. A read or write access to the register
stops the ongoing processing. To read the AES status use bit AES_DONE of register
AES_STATUS. Note that the AES_CTRL register is cleared when entering the radio
transceiver SLEEP state.
• Bit 7 – AES_REQUEST - Request AES Operation.
A write access with AES_REQUEST = 1 initiates the AES operation.
• Bit 6 – Res - Reserved Bit
This bit is reserved for future use. The result of a read access is undefined. The register
bit must always be written with the reset value.
• Bit 5 – AES_MODE - Set AES Operation Mode
This register bit sets the AES operation mode (ECB/CBC Mode).
Table 9-28 AES_MODE Register Bits
• Bit 4 – Res - Reserved Bit
This bit is reserved for future use. The result of a read access is undefined. The register
bit must always be written with the reset value.
• Bit 3 – AES_DIR - Set AES Operation Direction
This register bit sets the AES operation direction to either encryption or decryption.
Table 9-29 AES_DIR Register Bits
• Bit 2 – AES_IM - AES Interrupt Enable
This register bit is used to enable the AES interrupt.
• Bit 1:0 – Res1:0 - Reserved Bit
These bits are reserved for future use. The result of a read access is undefined. The
register bits must always be written with the reset value.
This read-only register signals the status of the security module and operation. Note
that the AES_STATUS register is cleared when entering the radio transceiver SLEEP
state.
• Bit 7 – AES_ER - AES Operation Finished with Error
Bit
NA ($13D)
Read/Write
Initial Value
Register Bits
AES_MODE
Register Bits
AES_DIR
AES_ER
R
7
0
Res5
R
6
0
Res4
R
5
0
Value
Value
Res3
0
1
0
1
R
4
0
Res2
R
3
0
Description
AES Mode is ECB (Electronic Code Book).
AES Mode is CBC (Cipher Block Chaining).
Description
AES operation is encryption.
AES operation is decryption.
Res1
R
2
0
Res0
R
1
0
AES_DONE AES_STATUS
8266B-MCU Wireless-03/11
R
0
0
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