ATMEGA128RFA1-ZUR Atmel, ATMEGA128RFA1-ZUR Datasheet - Page 271
ATMEGA128RFA1-ZUR
Manufacturer Part Number
ATMEGA128RFA1-ZUR
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA128-16AU.pdf
(385 pages)
2.ATAVR128RFA1-EK1.pdf
(13 pages)
3.ATAVR128RFA1-EK1.pdf
(555 pages)
Specifications of ATMEGA128RFA1-ZUR
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
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18.11.3 TCCR1C – Timer/Counter1 Control Register C
18.11.4 TCNT1H – Timer/Counter1 High Byte
8266B-MCU Wireless-03/11
• Bit 7 – FOC1A - Force Output Compare for Channel A
The FOC1A bit is only active when the WGM13:0 bits specify a non-PWM mode. When
writing a logical one to the FOC1A bit, an immediate compare match is forced on the
waveform generation unit. The OC1A output is changed according to its COM1A1:0 bits
setting. Note that the FOC1A bits are implemented as strobes. Therefore it is the value
present in the COM1A1:0 bits that determine the effect of the forced compare. A
FOC1A strobe will not generate any interrupt nor will it clear the timer in Clear Timer on
Compare Match (CTC) mode using OCR1A as TOP. The FOC1A bits are always read
as zero.
• Bit 6 – FOC1B - Force Output Compare for Channel B
The FOC1B bit is only active when the WGM13:0 bits specify a non-PWM mode. When
writing a logical one to the FOC1B bit, an immediate compare match is forced on the
waveform generation unit. The OC1B output is changed according to its COM1B1:0 bits
setting. Note that the FOC1B bits are implemented as strobes. Therefore it is the value
present in the COM1B1:0 bits that determine the effect of the forced compare. A
FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer on
Compare Match (CTC) mode using OCR1B as TOP. The FOC1B bits are always read
as zero.
• Bit 5 – FOC1C - Force Output Compare for Channel C
The FOC1C bit is only active when the WGM13:0 bits specify a non-PWM mode. When
writing a logical one to the FOC1C bit, an immediate compare match is forced on the
waveform generation unit. The OC1C output is changed according to its COM1C1:0 bits
setting. Note that the FOC1C bits are implemented as strobes. Therefore it is the value
present in the COM1C1:0 bits that determine the effect of the forced compare. A
FOC1C strobe will not generate any interrupt nor will it clear the timer in Clear Timer on
Compare Match (CTC) mode using OCR1C as TOP. The FOC1C bits are always read
as zero.
• Bit 4:0 – Res4:0 - Reserved
These bits are reserved for future use.
The two Timer/Counter I/O locations (TCNT1H and TCNT1L, combined TCNT1) give
direct access, both for read and for write operations, to the Timer/Counter unit 16-bit
counter. To ensure that both the high and low bytes are read and written simultaneously
when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other
Bit
NA ($82)
Read/Write
Initial Value
Bit
NA ($85)
Read/Write
Initial Value
FOC1A
RW
RW
7
0
7
0
RW
FOC1B
6
0
RW
6
0
RW
5
0
FOC1C
RW
5
0
RW
TCNT1H7:0
4
0
Res4
R
4
0
RW
3
0
Res3
R
3
0
RW
2
0
ATmega128RFA1
Res2
R
2
0
RW
1
0
Res1
RW
R
1
0
0
0
Res0
R
0
0
TCNT1H
TCCR1C
271
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