SI1012-A-GM Silicon Laboratories Inc, SI1012-A-GM Datasheet - Page 365
![IC TXRX MCU + EZRADIOPRO](/photos/14/21/142131/42-qfn-series_sml.jpg)
SI1012-A-GM
Manufacturer Part Number
SI1012-A-GM
Description
IC TXRX MCU + EZRADIOPRO
Manufacturer
Silicon Laboratories Inc
Specifications of SI1012-A-GM
Package / Case
42-QFN
Frequency
240MHz ~ 960MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
13dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Memory Size
16kB Flash, 768B RAM
Antenna Connector
PCB, Surface Mount
Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
240 MHz to 960 MHz
Interface Type
UART, SMBus, SPI, PCA
Output Power
13 dBm
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
4 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Protocol Supported
C2, SMBus
Core
8051
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
768 B
Supply Current (max)
4 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1871-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI1012-A-GMR
Manufacturer:
ROHM
Quantity:
12 000
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Note: The CEXn input signal must remain high or low for at least 2 system clock cycles to be recognized by the
28.3.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1. An interrupt request is generated if the CCFn interrupt for that module is
enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt
service routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn
register enables Software Timer mode.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0
Capture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Port I/O
PCA0CPLn
Write to
Reset
hardware.
PCA0CPHn
Write to
Crossbar
0
ENB
ENB
1
W
P
M
Figure 28.5. PCA Software Timer Mode Diagram
1
6
n
x
E
C
O
M
n
CEXn
PCA0CPMn
C
A
P
P
n
0 0
Figure 28.4. PCA Capture Mode Diagram
C
A
P
N
n
M
A
T
n
O
G
T
n
0 0
W
M
P
n
C
C
E
F
n
x
Enable
PCA
Timebase
W
M
P
1
6
n
x
PCA0CPMn
E
C
O
M
n
x
C
A
P
P
n
Rev. 1.0
C
A
P
N
n
PCA0CPLn
0
1
M
A
T
n
0 0 0 x
PCA0L
O
G
T
n
16-bit Comparator
W
P
M
n
E
C
C
F
n
0
1
C
PCA0CPHn
F
C
R
PCA0H
PCA0CN
PCA
Timebase
C
C
F
2
C
C
F
1
Si1010/1/2/3/4/5
C
C
F
0
PCA Interrupt
Match
Capture
PCA0CPLn
PCA0L
C
F
C
R
PCA0CN
0
1
C
C
F
2
PCA0CPHn
C
C
F
1
PCA0H
C
C
F
0
PCA Interrupt
365
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