NUC100RE3AN Nuvoton Technology Corporation of America, NUC100RE3AN Datasheet - Page 522
![IC MCU 32BIT 128KB FLASH 64LQFP](/photos/28/73/287358/nuc100re3an_sml.jpg)
NUC100RE3AN
Manufacturer Part Number
NUC100RE3AN
Description
IC MCU 32BIT 128KB FLASH 64LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC100RE3AN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
49
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUC100RE3AN
Manufacturer:
NuvoTon
Quantity:
2 000
Company:
Part Number:
NUC100RE3AN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC100RE3AN
Manufacturer:
NUVOTON
Quantity:
20 000
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PDMA Transfer Source Address Register (PDMA_SARx)
Register
PDMA_SAR0
PDMA_SAR1
PDMA_SAR2
PDMA_SAR3
PDMA_SAR4
PDMA_SAR5
PDMA_SAR6
PDMA_SAR7
PDMA_SAR8
Notice: Low Density only support PDMA channel 0.
Bits
[31:0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
PDMA_SAR
Offset
PDMA_BA_ch0+0x04
PDMA_BA_ch1+0x04
PDMA_BA_ch2+0x04
PDMA_BA_ch3+0x04
PDMA_BA_ch4+0x04
PDMA_BA_ch5+0x04
PDMA_BA_ch6+0x04
PDMA_BA_ch7+0x04
PDMA_BA_ch8+0x04
30
22
14
6
PDMA Transfer Source Address Register
This field indicates a 32-bit source address of PDMA.
Note : The source address must be word alignment
29
21
13
5
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PDMA_SAR [31:24]
PDMA_SAR [23:16]
PDMA_SAR [15:8]
Description
PDMA Transfer Source Address Register CH0
PDMA Transfer Source Address Register CH1
PDMA Transfer Source Address Register CH2
PDMA Transfer Source Address Register CH3
PDMA Transfer Source Address Register CH4
PDMA Transfer Source Address Register CH5
PDMA Transfer Source Address Register CH6
PDMA Transfer Source Address Register CH7
PDMA Transfer Source Address Register CH8
PDMA_SAR [7:0]
28
20
12
4
- 522 -
27
19
11
3
Publication Release Date: Dec. 22, 2010
26
18
10
2
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
24
16
8
0
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