MC9S08SH8CWJR Freescale Semiconductor, MC9S08SH8CWJR Datasheet - Page 151
MC9S08SH8CWJR
Manufacturer Part Number
MC9S08SH8CWJR
Description
IC MCU 8BIT 8K FLASH 20WSOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08SH8CWJR.pdf
(338 pages)
Specifications of MC9S08SH8CWJR
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Interface Type
SPI, SCI, RS-232
Maximum Clock Frequency
5 MHz, 40 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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10.1.2
Key features of the ICS module follow. For device specific information, refer to the ICS Characteristics in
the Electricals section of the documentation.
10.1.3
Figure 10-2
Freescale Semiconductor
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Frequency-locked loop (FLL) is trimmable for accuracy
— 0.2% resolution using internal 32kHz reference
— 2% deviation over voltage and temperature using internal 32kHz reference
Internal or external reference clocks up to 5MHz can be used to control the FLL
— 3 bit select for reference divider is provided
Internal reference clock has 9 trim bits available
Internal or external reference clocks can be selected as the clock source for the MCU
Whichever clock is selected as the source can be divided down
— 2 bit select for clock divider is provided
Control signals for a low power oscillator as the external reference clock are provided
— HGO, RANGE, EREFS, ERCLKEN, EREFSTEN
FLL Engaged Internal mode is automatically selected out of reset
– Allowable dividers are: 1, 2, 4, 8
– BDC clock is provided as a constant divide by 2 of the DCO output
Features
Block Diagram
is the ICS block diagram.
MC9S08SH8 MCU Series Data Sheet, Rev. 3
Chapter 10 Internal Clock Source (S08ICSV2)
151
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