PK40N512VMD100 Freescale Semiconductor, PK40N512VMD100 Datasheet - Page 19

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PK40N512VMD100

Manufacturer Part Number
PK40N512VMD100
Description
IC ARM CORTEX MCU 512K 144-MAP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheets

Specifications of PK40N512VMD100

Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
Peripherals
DMA, I²S, LCD, LVD, POR, PWM, WDT
Number Of I /o
98
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 33x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Rohs Compliant
Yes
Processor Series
Kinetis
Core
ARM Cortex M4
Data Ram Size
128 KB
Interface Type
UART, SPI, I2C, I2S, CAN
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
98
Operating Supply Voltage
1.71 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PK40N512VMD100
Manufacturer:
FSL
Quantity:
185
Part Number:
PK40N512VMD100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3. Specified according to Annex D of IEC Standard 61967-2, Measurement of Radiated Emissions—TEM Cell and Wideband
5.1.7 Designing with radiated emissions in mind
To find application notes that provide guidance on designing your system to minimize
interference from radiated emissions:
5.1.8 Capacitance attributes
5.2 Switching specifications
5.2.1 Device clock specifications
Freescale Semiconductor, Inc.
1. Go to http://www.freescale.com.
2. Perform a keyword search for “EMC design.”
f
Symbol
SYS_USB
TEM Cell Method, and Appendix D of SAE Standard J1752-3, Measurement of Radiated Emissions from Integrated
Circuits—TEM/Wideband TEM (GTEM) Cell Method.
f
f
f
f
Symbol
LPTMR
LPTMR
FLASH
FLASH
f
f
f
f
C
C
SYS
BUS
SYS
BUS
IN_A
IN_D
System and core clock
System and core clock when Full Speed USB in
operation
Bus clock
Flash clock
LPTMR clock
System and core clock
Bus clock
Flash clock
LPTMR clock
Description
Input capacitance: analog pins
Input capacitance: digital pins
Description
K40 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Table 9. Device clock specifications
Table 8. Capacitance attributes
Normal run mode
Preliminary
VLPR mode
Min.
20
Min.
Max.
100
50
25
25
25
2
2
1
Max.
7
7
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
Notes
pF
pF
General
19

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