PK60X256VMD100 Freescale Semiconductor, PK60X256VMD100 Datasheet - Page 18

• Manufacturer Part Number: PK60X256VMD100
• Description: IC ARM CORTEX MCU 256K 144-MAP
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr

Specifications of PK60X256VMD100

• Core Processor: ARM Cortex-M4
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
• Peripherals: DMA, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 33x16b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LBGA
• Processor Series: Kinetis
• Core: ARM Cortex M4
• Data Ram Size: 64 KB
• Interface Type: UART, SPI, I2C, I2S, CAN
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 100
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

General
2. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock . MCG configured for FEI mode.
3. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
4. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
5. 25MHz core and system clock, 25MHz bus clock, and 12.5MHz FlexBus and flash clock. MCG configured for FEI mode.
6. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
7. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
8. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
9. Data reflects devices with 128 KB of RAM. For devices with 64 KB of RAM, power consumption is reduced by 2 μA.
10. Includes 32kHz oscillator current and RTC operation.
5.1.5.1 Diagram: Typical IDD_RUN operating behavior
The following data was measured under these conditions:
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• MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE)
• All peripheral clocks disabled except FTFL
• LVD disabled, USB regulator disabled
• No GPIOs toggled
• Code execution from flash
All peripheral clocks disabled.
peripheral clocks enabled, but peripherals are not in active operation.
peripheral clocks enabled, and peripherals are in active operation.
disabled. Code executing from flash.
enabled but peripherals are not in active operation. Code executing from flash.
disabled.
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Preliminary
Freescale Semiconductor, Inc.