WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 26

• Manufacturer Part Number: WM8776SEFT/V
• Description: Audio CODECs Stereo CODEC with 5-Ch Mux
• Manufacturer: Wolfson Microelectronics

Specifications of WM8776SEFT/V

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8776
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When operating the ADC digital interface in slave mode, to optimise the performance of the ADC it is
recommended that the ADCMCLK and ADCBCLK input signals do not have coinciding rising edges.
The ADCMCLK bit provides the option to internally invert the ADCMCLK input signal when the input
signals have coinciding rising edges.
A number of options are available to control how data from the Digital Audio Interface is applied to
the DAC.
MASTER MODES
Control bit ADCMS selects between audio interface Master and Slave Modes for ADC. In ADC
Master mode ADCLRC and ADCBCLK are outputs and are generated by the WM8776. In Slave
mode ADCLRC and ADCBCLK are inputs to WM8776.
Control bit DACMS selects between audio interface Master and Slave Modes for the DAC. In DAC
Master mode DACLRC and DACBCLK are outputs and are generated by the WM8776. In Slave
mode DACLRC and DACBCLK are inputs to WM8776.
MASTER MODE ADCLRC/DACLRC FREQUENCY SELECT
In ADC Master mode the WM8776 generates ADCLRC and ADCBCLK, in DAC master mode the
WM8776 generates DACLRC and DACBCLK. These clocks are derived from the master clock
(ADCMCLK or DACMCLK). The ratios of ADCMCLK to ADCLRC and DACMCLK to DACLRC are
set by ADCRATE and DACRATE respectively.
ADCLRC and DACLRC
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
frequency select
Interface Control
Interface Control
Interface Control
R12 (0Ch)
R12 (0Ch)
R12 (0Ch)
R11(0Bh)
0001011
0001100
0001100
0001100
BIT
BIT
BIT
BIT
2:0
6:4
6
9
8
ADCRATE[2:0]
DACRATE[2:0]
ADCMCLK
ADCMS
DACMS
LABEL
LABEL
LABEL
LABEL
DEFAULT
DEFAULT
DEFAULT
0
0
DEFAULT
0
010
010
Audio Interface Master/Slave Mode
select for ADC:
Audio Interface Master/Slave Mode
select for DAC:
0 : Slave Mode
1: Master Mode
0 : Slave Mode
1: Master Mode
ADCMCLK Polarity
0 : non-inverted
1: inverted
Master Mode MCLK:ADCLRC
ratio select:
Master Mode MCLK:DACLRC
ratio select:
PD, Rev 4.1, September 2008
010: 256fs
011: 384fs
100: 512fs
101: 768fs
000: 128fs
001: 192fs
010: 256fs
011: 384fs
100: 512fs
101: 768fs
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
Production Data
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