WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 46

Audio CODECs Stereo CODEC with 5-Ch Mux

WM8776SEFT/V

Manufacturer Part Number
WM8776SEFT/V
Description
Audio CODECs Stereo CODEC with 5-Ch Mux
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8776SEFT/V

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-48
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8776
w
ALC Control 1
ALC Control 2
REGISTER
Attenuation
ADDRESS
R16 (10h)
R17 (11h)
R15 (0Fh)
0010000
0010001
0001111
ADCR
3:0
6:4
3:0
BIT
7:0
8:7
8
7
8
RAG[7:0]
ZCRA
LCT[3:0]
MAXGAIN[2:0]
LCSEL[1:0]
HLD[3:0]
ALCZC
LCEN
LABEL
1011
(-5dB)
111
(+24dB)
00
(Limiter)
0000
(OFF)
0 (zero
cross off)
0
DEFAULT
11001111
(0dB)
0
Attenuation data for right channel ADC gain in 0.5dB steps.
00000000 : digital mute
00000001 : -103dB
………..
11001111 : 0dB
…………
11111110 : +23.5dB
11111111 : +24dB
Right ADC zero cross enable:
Limiter threshold/ALC target level in 1dB steps
0000: -16dB FS
0001: -15dB FS
1101: -3dB FS
1110: -2dB FS
1111: -1dB FS
Set Maximum Gain of PGA
111 : +24dB
110 : +20dB
….(-4dB steps)
010 : +4dB
001 : 0dB
000 : 0dB
ALC/Limiter function select
00 = Limiter
01 = ALC Right channel only
10 = ALC Left channel only
11 = ALC Stereo (PGA registers unused)
ALC hold time before gain is increased.
0000: OFF
0001: 2.67ms
0010: 5.33ms
… (time doubles with every step)
1111: 43.691s
ALC uses zero cross detection circuit.
Enable Gain control circuit.
0 = Disable
1 = Enable
0: Zero cross disabled
1: Zero cross enabled
DESCRIPTION
PD, Rev 4.1, September 2008
Production Data
46

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