WM8776SEFT/V Wolfson Microelectronics, WM8776SEFT/V Datasheet - Page 42

Audio CODECs Stereo CODEC with 5-Ch Mux

WM8776SEFT/V

Manufacturer Part Number
WM8776SEFT/V
Description
Audio CODECs Stereo CODEC with 5-Ch Mux
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8776SEFT/V

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-48
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Master Analogue
WM8776
w
(All Channels)
(All Channels
Headphone
Headphone
Headphone
Headphone
Headphone
Attenuation
Attenuation
Attenuation
Attenuation
Attenuation
Attenuation
REGISTER
ADDRESS
Analogue
Analogue
R0 (00h)
0000000
R1 (01h)
0000001
R2 (02h)
0000010
R3 (03h)
0000011
R4 (04h)
0000100
R5 (05h)
0000101
Master
DACR
Digital
Digital
Digital
DACL
Right
Left
BIT
6:0
6:0
6:0
7:0
7:0
7:0
7
8
7
8
7
8
8
8
8
HPMASTA[6:0]
MASTDA[7:0]
HPRA[6:0]
HPRZCEN
UPDATEA
UPDATED
UPDATED
UPDATED
HPLZCEN
RDA1[6:0]
HPLA[6:0]
LDA1[7:0]
UPDATE
UPDATE
MZCEN
LABEL
Not latched
Not latched
Not latched
Not latched
Not latched
Not latched
DEFAULT
11111111
11111111
11111111
1111001
1111001
1111001
(0dB)
(0dB)
(0dB)
(0dB)
(0dB)
(0dB)
0
0
0
Attenuation data for HEADPHONE left channel in 1dB steps.
Left HEADPHONE zero cross detect enable
Controls simultaneous update of all Attenuation Latches
Attenuation data for Headphone right channel in 1dB steps.
Right Headphone zero cross detect enable
Controls simultaneous update of all Attenuation Latches
Attenuation data for all ANALOGUE gains (L and R channels) in
1dB steps.
Master zero cross detect enable
Controls simultaneous update of all Attenuation Latches
Digital Attenuation data for Left channel DACL in 0.5dB steps.
Controls simultaneous update of all Attenuation Latches
Digital Attenuation data for Right channel DACR in 0.5dB steps.
Controls simultaneous update of all Attenuation Latches
Digital Attenuation data for all DAC channels in 0.5dB steps.
Controls simultaneous update of all Attenuation Latches
0: Store HPLA in intermediate latch (no change to output)
1: Store HPLA and update attenuation on all channels.
0: Store HPRA in intermediate latch (no change to output)
1: Store HPRA and update attenuation on all channels.
0: Store gains in intermediate latch (no change to output)
1: Store gains and update attenuation on all channels.
0: Store LDA1 in intermediate latch (no change to output)
1: Store LDA1 and update attenuation on all channels
0: Store RDA1 in intermediate latch (no change to output)
1: Store RDA1 and update attenuation on all channels.
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
0: zero cross disabled
1: zero cross enabled
0: zero cross disabled
1: zero cross enabled
0: zero cross disabled
1: zero cross enabled
DESCRIPTION
PD, Rev 4.1, September 2008
Production Data
42

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