MAX98088EWY+T Maxim Integrated Products, MAX98088EWY+T Datasheet - Page 22

• Manufacturer Part Number: MAX98088EWY+T
• Description: Audio CODECs DUAL I2S CODEC AUDIO STEREO
• Manufacturer: Maxim Integrated Products

Specifications of MAX98088EWY+T

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Resolution: 24 bit
• Operating Supply Voltage: 1.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: WLP-63
• Number Of Channels: 2
• Supply Current: 4.5 mA
• Thd Plus Noise: - 77 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Stereo Audio Codec
with FlexSound Technology
AUDIO INTERFACE TIMING CHARACTERISTICS
(V
(Note 1)
Figure 1. Non-TDM Audio Interface Timing Diagrams (TDM_ = 0)
22
BCLK Cycle Time
BCLK High Time
BCLK Low Time
BCLK or LRCLK Rise and Fall Time
SDIN to BCLK Setup Time
LRCLK to BCLK Setup Time
SDIN to BCLK Hold Time
LRCLK to BCLK Hold Time
Minimum Delay Time from LSB
BCLK Falling Edge to
High-Impedance State
LRCLK Rising Edge to SDOUT
MSB Delay
BCLK to SDOUT Delay
Delay Time from BCLK to LRCLK
Delay Time from LRCLK to BCLK
After LSB
AVDD
(OUTPUT)
(OUTPUT)
(OUTPUT)
(INPUT)
SDOUT
LRCLK
BCLK
SDIN
= V
PARAMETER
t
R
HPVDD
LSB
LSB
= V
DVDD
t
HIZOUT
t
CLKSYNC
t
F
= V
MASTER MODE
HI-Z
DVDDS1
t
SYNCHOLD
t
SYMBOL
t
t
ENDSYNC
t
CLKSYNC
SYNCSET
t
t
t
SYNCTX
t
t
t
CLKTX
HIZOUT
t
t
BCLKH
BCLKL
SETUP
CLKTX
t
HOLD
BCLK
R
= V
, t
F
DVDDS2
t
SETUP
Slave mode
Slave mode
Slave mode
Master mode, C
Slave mode
Slave mode
Master mode, TDM_ = 1
C
C
Master
mode
Master
mode
MSB
L
L
MSB
= +1.8V, V
= 30pF, TDM_ = 1, FSW_ = 1
= 30pF
t
HOLD
TDM_ = 1, BCLK rising edge
TDM_ = 0
TDM_ = 1
TDM_ = 0
TDM_ = 1, FSW_ = 1
SPKLVDD
CONDITIONS
L
= 15pF
(OUTPUT)
(INPUT)
(INPUT)
(INPUT)
SDOUT
LRCLK
BCLK
SDIN
= V
SPKRVDD
LSB
LSB
= 3.7V, T A = +25NC, unless otherwise noted.)
t
HIZOUT
t
SYNCSET
SLAVE MODE
MIN
-15
90
20
20
20
20
20
20
20
HI-Z
t
BCLKH
t
CLKTX
TYP
42
t
BCLK
t
SETUP
t
BCLKL
MAX
0.8 x
+15
50
50
50
MSB
MSB
t
BCLKL
t
HOLD
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns