LAN8700C-AEZG-TR SMSC, LAN8700C-AEZG-TR Datasheet - Page 49

• Manufacturer Part Number: LAN8700C-AEZG-TR
• Description: Ethernet ICs Hi Perform Ethernet PHY
• Manufacturer: SMSC
• Type: Single Chipr

Specifications of LAN8700C-AEZG-TR

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Transceivers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3ab
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 39 mA, 81.6 mA
• Maximum Operating Temperature: + 85 C
• Package / Case: QFN EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR
Datasheet
SMSC LAN8700/LAN8700i
5.3.2
5.4
5.4.1
Mask
30.7
30.6
30.5
30.4
30.3
30.2
30.1
29.7
29.6
29.5
29.4
29.3
29.2
29.1
Alternate Interrupt System
The Alternative method is enabled by writing a ‘1’ to 17.6 (ALTINT).
To set an interrupt, set the corresponding bit of the in the Mask Register 30, (see
To Clear an interrupt, either clear the corresponding bit in the Mask Register (30), this will de-assert
the nINT output, or Clear the Interrupt Source, and write a ‘1’ to the corresponding Interrupt Source
Flag. Writing a ‘1’ to the Interrupt Source Flag will cause the state machine to check the Interrupt
Source to determine if the Interrupt Source Flag should clear or stay as a ‘1’. If the Condition to De-
Assert is true, then the Interrupt Source Flag is cleared, and the nINT is also de-asserted. If the
Condition to De-Assert is false, then the Interrupt Source Flag remains set, and the nINT remains
asserted.
For example 30.7 is set to ‘1’ to enable the ENERGYON interrupt. After a cable is plugged in,
ENERGYON (17.1) goes active and nINT will be asserted low.
To de-assert the nINT interrupt output, either.
Note: The ENERGYON bit 17.1 is defaulted to a ‘1’ at the start of the signal acquisition process,
Carrier Sense
The carrier sense is output on CRS. CRS is a signal defined by the MII specification in the IEEE 802.3u
standard. The PHY asserts CRS based only on receive activity whenever the PHY is either in repeater
mode or full-duplex mode. Otherwise the PHY asserts CRS based on either transmit or receive activity.
The carrier sense logic uses the encoded, unscrambled data to determine carrier activity status. It
activates carrier sense with the detection of 2 non-contiguous zeros within any 10 bit span. Carrier
sense terminates if a span of 10 consecutive ones is detected before a /J/K/ Start-of Stream Delimiter
pair. If an SSD pair is detected, carrier sense is asserted until either /T/R/ End–of-Stream Delimiter
pair or a pair of IDLE symbols is detected. Carrier is negated after the /T/ symbol or the first IDLE. If
/T/ is not followed by /R/, then carrier is maintained. Carrier is treated similarly for IDLE followed by
some non-IDLE symbol.
Miscellaneous Functions
Interrupt Source Flag
Parallel Detection Fault
Remote Fault Detected
Auto-Negotiation Page
Auto-Negotiation LP
Auto-Negotiation
Acknowledge
ENERGYON
therefore the Interrupt source flag 29.7 will also read as a ‘1’ at power-up. If no signal is
present, then both 17.1 and 29.7 will clear within a few milliseconds.
Link Down
1. Clear the ENERGYON bit (17.1), by removing the cable, then writing a ‘1’ to register 29.7.
Or
2. Clear the Mask bit 30.1 by writing a ‘0’ to 30.1.
Received
complete
Table 5.47 Alternative Interrupt System Management Table.
17.1
5.14
1.5
1.4
1.2
6.4
6.1
Interrupt Source
DATASHEET
Parallel Detection
Page Received
Auto-Negotiate
Remote Fault
Acknowledge
ENERGYON
Link Status
Complete
Fault
®
49
Technology in a Small Footprint
Event to Assert
Rising 17.1
Rising 5.14
Falling 1.2
Rising 1.5
Rising 1.4
Rising 6.4
Rising 6.1
nINT
Condition to
De-Assert.
17.1 low
5.14 low
1.2 high
1.5 low
1.4 low
6.4 low
6.1 low
Revision 2.2 (12-04-09)
Table
Bit to Clear
5.47).
nINT
29.7
29.6
29.5
29.4
29.3
29.2
29.1