PIC18F6585-I/L Microchip Technology, PIC18F6585-I/L Datasheet - Page 48

Microcontrollers (MCU) 48KB 3328 RAM 52 I/O

PIC18F6585-I/L

Manufacturer Part Number

PIC18F6585-I/L

Description

Microcontrollers (MCU) 48KB 3328 RAM 52 I/O

Manufacturer

Microchip Technology

Datasheet

1.PCM18XK1.pdf (496 pages)

Specifications of PIC18F6585-I/L

Processor Series

PIC18F

Core

PIC

Data Bus Width

8 bit

Data Ram Size

3.25 KB

Interface Type

I2C/SPI/AUSART/CAN

Maximum Clock Frequency

40 MHz

Number Of Programmable I/os

Number Of Timers

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

3rd Party Development Tools

52715-96, 52716-328, 52717-734, 52712-325, EWPIC18

Development Tools By Supplier

PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032

Minimum Operating Temperature

- 40 C

On-chip Adc

12-ch x 10-bit

Program Memory Type

Flash

Program Memory Size

48 KB

Package / Case

PLCC-68

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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PIC18F6585/8585/6680/8680

TABLE 3-3:

DS30491C-page 46

B1D1

B1D0

B1DLC

B1EIDL

B1EIDH

B1SIDL

B1SIDH

B1CON

B0D7

B0D6

B0D5

B0D4

B0D3

B0D2

B0D1

B0D0

B0DLC

B0EIDL

B0EIDH

B0SIDL

B0SIDH

B0CON

TXBIE

BIE0

BSEL0

MSEL3

MSEL2

MSEL1

MSEL0

SDFLC

RXFCON1

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Note 1:

(7)

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

See Table 3-2 for Reset value for specific condition.

Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other

oscillator modes, they are disabled and read ‘0’.

Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they read ‘0’.

This register reads all ‘0’s until ECAN is set up in Mode 1 or Mode 2.

PIC18F6X8X PIC18F8X8X

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Applicable Devices

Brown-out Reset

Power-on Reset,

xxxx xxxx

-xxx xxxx

xxxx xxxx

xxxx x-xx

xxxx xxxx

0000 0000

xxxx xxxx

-xxx xxxx

xxxx xxxx

xxxx x-xx

xxxx xxxx

0000 0000

---0 00--

0000 0000

0000 00--

0000 0000

0000 0101

0101 0000

---0 0000

0000 0000

RESET Instruction

MCLR Resets

Stack Resets

WDT Reset

uuuu uuuu

-uuu uuuu

uuuu uuuu

uuuu u-uu

uuuu uuuu

0000 0000

uuuu uuuu

-uuu uuuu

uuuu uuuu

uuuu u-uu

uuuu uuuu

0000 0000

---u uu--

0000 0000

0000 00--

0000 0000

0000 0101

0101 0000

---0 0000

0000 0000

 2004 Microchip Technology Inc.

Wake-up via WDT

or Interrupt

uuuu uuuu

-uuu uuuu

uuuu uuuu

uuuu u-uu

uuuu uuuu

-uuu uuuu

uuuu uuuu

uuuu u-uu

uuuu uuuu

---u uu--

uuuu uuuu

uuuu uu--

uuuu uuuu

-u-- uuuu

uuuu uuuu

PIC18F6585-I/L Microchip Technology, PIC18F6585-I/L Datasheet - Page 48

PIC18F6585-I/L

Specifications of PIC18F6585-I/L

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