ispPAC-POWR1220AT8-02TN100I Lattice, ispPAC-POWR1220AT8-02TN100I Datasheet - Page 26
![Current & Power Monitors & Regulators Prec. Power Supply Seq. Monitor Marg.](/photos/16/2/160258/tqfp-100_sml.jpg)
ispPAC-POWR1220AT8-02TN100I
Manufacturer Part Number
ispPAC-POWR1220AT8-02TN100I
Description
Current & Power Monitors & Regulators Prec. Power Supply Seq. Monitor Marg.
Manufacturer
Lattice
Series
ispPAC®r
Datasheet
1.ISPPAC-POWR1220AT8-02TN100I.pdf
(54 pages)
Specifications of ispPAC-POWR1220AT8-02TN100I
Mounting Style
SMD/SMT
Supply Voltage (max)
3.96 V
Supply Voltage (min)
2.8 V
Package / Case
TQFP-100
Applications
General Purpose
Voltage - Input
-0.3 V ~ 5.9 V
Voltage - Supply
2.8 V ~ 3.96 V
Current - Supply
40mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISPPAC-POWR1220AT8-02TN100I
Manufacturer:
Lattice
Quantity:
226
Company:
Part Number:
ISPPAC-POWR1220AT8-02TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Figure 1-16. TrimCell Driving a Typical DC-DC Converter
Figure 1-16 shows the resistor network between the TrimCell #N in the ispPAC-POWR1220AT8 and the DC-DC
converter. The values of these resistors depend on the type of DC-DC converter used and its operating voltage
range. The method to calculate the values of the resistors R1, R2, and R3 are described in a separate application
note.
Voltage Profile Control
The Margin / Trim Block of ispPAC-POWR1220AT8 consists of eight TrimCells. Because all eight TrimCells in the
Margin / Trim Block are controlled by two common voltage profile control signals, they all operate at the same volt-
age profile. These common voltage profile control signals are derived from a Control Multiplexer. One set of voltage
profile control inputs to the control multiplexer is from a pair of device pins: VPS0, VPS1. The second set of voltage
profile control inputs is from the PLD: PLD_VPS0, PLD_VPS1. The selection between the two sets of voltage pro-
file control signals is programmable and is stored in the E
TrimCell
#N
DAC
R
3
R
1-26
1
2
CMOS memory.
R
2
V
Trim
ispPAC-POWR1220AT8 Data Sheet
OUT
V
Converter
OUT
DC-DC
V
IN