LC4064ZE-5TN100C Lattice, LC4064ZE-5TN100C Datasheet - Page 14

• Manufacturer Part Number: LC4064ZE-5TN100C
• Description: CPLD - Complex Programmable Logic Devices 64MC 64 I/O Ultra Low Power 1.8V
• Manufacturer: Lattice
• Series: ispMACH®r

Specifications of LC4064ZE-5TN100C

• Memory Type: EEPROM
• Number Of Macrocells: 64
• Maximum Operating Frequency: 277.78 MHz
• Delay Time: 5.8 ns
• Number Of Programmable I/os: 64
• Operating Supply Voltage: 1.8 V
• Supply Current: 0.08 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 1.9 V
• Supply Voltage (min): 1.7 V
• Programmable Type: CPLD
• Voltage - Input: 1.7 V ~ 1.9 V
• Speed: 5.8ns
• Mounting Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 13. On-Chip Oscillator and Timer
Table 11. On-Chip Oscillator and Timer Signal Names
OSCTIMER has two outputs, OSCOUT and TIMEROUT. The outputs feed into the Global Routing Pool (GRP).
From GRP, these signals can drive any macrocell input, as well as any output pin (with macrocell bypass). The out-
put OSCOUT is the direct oscillator output with a typical frequency of 5MHz, whereas, the output TIMEROUT is the
oscillator output divided by an attribute TIMER_DIV.
The attribute TIMER_DIV can be: 128 (7 bits), 1024 (10 bits) or 1,048,576 (20 bits). The divided output is provided
for those user situations, where a very slow clock is desired. If even a slower toggling clock is desired, then the pro-
grammable macrocell resources can be used to further divide down the TIMEROUT output.
Figure 14 shows the simplified relationship among OSCOUT, TIMERRES and TIMEROUT. In the diagram, the sig-
nal “R” is an internal reset signal that is used to synchronize TIMERRES to OSCOUT. This adds one extra clock
cycle delay for the first timer transition after TIMERRES.
Figure 14. Relationship Among OSCOUT, TIMERRES and TIMEROUT
OSCOUT
TIMEROUT
TIMERRES
DYNOSCDIS
Signal Name
OSCOUT
TIMERRES
R (Internal)
TIMEROUT
Note: n = Number of bits in the divider (7, 10 or 20)
Metastability: If the signal TIMERRES is not synchronous to OSCOUT, it could make a
Output
Output
Input
Input
Input or Out-
difference of one or two clock cycles to the TIMEROUT going high the first time.
put
-1
0
Optional
Optional
Optional
Optional
DYNOSCDIS
TIMERRES
Optional /
Required
1
2
Oscillator Output (Nominal Frequency: 5MHz)
Oscillator Frequency Divided by an integer TIMER_DIV (Default 128)
Reset the Timer
Disables the Oscillator, resets the Timer and saves the power.
OSCTIMER
14
2
n
/ 2
ispMACH 4000ZE Family Data Sheet
OSCOUT
TIMEROUT
Description
2
n
MPW