A2F500M3G-FGG256 Actel, A2F500M3G-FGG256 Datasheet - Page 3
![FPGA - Field Programmable Gate Array 500K System Gates](/photos/16/14/161496/lpsilverchip_sml.jpg)
A2F500M3G-FGG256
Manufacturer Part Number
A2F500M3G-FGG256
Description
FPGA - Field Programmable Gate Array 500K System Gates
Manufacturer
Actel
Datasheet
1.A2F500M3G-FGG256.pdf
(192 pages)
Specifications of A2F500M3G-FGG256
Processor Series
A2F500
Core
ARM Cortex M3
Number Of Logic Blocks
24
Maximum Operating Frequency
100 MHz
Number Of Programmable I/os
117
Data Ram Size
64 KB
Delay Time
50 ns
Supply Voltage (max)
3.6 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
500000
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A2F500M3G-FGG256
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A2F500M3G-FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A2F500M3G-FGG256I
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
Package I/Os: MSS + FPGA I/Os
SmartFusion Device Status
Device
Package
Direct Analog Inputs
Shared Analog Inputs
Total Analog Inputs
Total Analog Outputs
MSS I/Os
FPGA I/Os
Total I/Os
Notes:
1. These pins are shared between direct analog inputs to the ADCs and voltage/current/temperature monitors.
2. 16 MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for MSS. These I/Os support Schmitt triggers and
3. 9 MSS I/Os are primarily for 10/100 Ethernet MAC and are also multiplexed and can be used as FPGA I/Os if Ethernet MAC is
4. 10/100 Ethernet MAC is not available on A2F060.
Device
A2F060
A2F200
A2F500
support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, 3.3 V) standards.
not used in a design. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, 3.3 V
standards.
2,3
1
CS288
28
107
10
68
6
4
1
4
A2F060
FG256
102
25
10
66
6
4
1
4
PQ208
113
16
24
22
66
8
1
Revision 6
CS288
135
16
24
31
78
8
2
A2F200
FG256
117
16
24
25
66
8
2
Production: FG256, FG484
Production: FG256, FG484
FG484
161
16
24
41
94
Preliminary: CS288
Preliminary: CS288
8
2
Advance: PQ208
Advance: PQ208
SmartFusion Intelligent Mixed Signal FPGAs
Advance
Status
PQ208
113
16
24
22
66
8
1
CS288
135
16
24
31
78
8
2
A2F500
FG256
117
16
24
25
66
8
2
FG484
128
204
20
32
41
12
3
III