LFXP10E-3FN256I Lattice, LFXP10E-3FN256I Datasheet - Page 99
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LFXP10E-3FN256I
Manufacturer Part Number
LFXP10E-3FN256I
Description
FPGA - Field Programmable Gate Array 9.7K LUTs 188 IO 1.2 V -3 Spd I
Manufacturer
Lattice
Datasheet
1.LFXP3C-3QN208C.pdf
(130 pages)
Specifications of LFXP10E-3FN256I
Number Of Programmable I/os
188
Data Ram Size
221184
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP10E-3FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LFXP10, LFXP15 & LFXP20 Logic Signal Connections: 388 fpBGA (Cont.)
Number
AB22
Ball
C10
A22
AB1
H10
H11
H12
H13
H14
K10
J10
J11
J12
J13
J14
C6
C9
C5
D9
D8
C4
C3
C2
D3
D7
D6
D4
D5
C1
A7
B7
A6
B6
A5
B5
A4
B4
A2
A3
B3
E4
B2
B1
A1
J9
-
-
-
-
Function
GNDIO0
GNDIO0
GNDIO0
GNDIO0
PT13A
PT12B
PT12A
PT11B
PT11A
PT10B
PT10A
DONE
CFG0
CFG1
PT9B
PT8A
PT7B
PT7A
PT6B
PT6A
PT5B
PT5A
PT4B
PT4A
PT3B
PT3A
PT2A
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Ball
-
-
-
-
-
-
Bank Diff.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LFXP10
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Dual Function
VREF2_0
CSN
DQS
DI
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Function
GNDIO0
GNDIO0
GNDIO0
GNDIO0
PT18A
PT17B
PT17A
PT16B
PT16A
PT15B
PT15A
PT14B
PT13A
PT12B
PT12A
PT11B
PT11A
PT10B
PT10A
DONE
CFG0
CFG1
PT9B
PT9A
PT8B
PT8A
PT7B
PT7A
PT6B
PT5A
PT4B
PT4A
PT3B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Ball
Bank Diff.
4-40
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LFXP15
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Dual Function
VREF2_0
CSN
DQS
DQS
DI
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LatticeXP Family Data Sheet
Function
GNDIO0
GNDIO0
GNDIO0
GNDIO0
PT22A
PT21B
PT21A
PT20B
PT20A
PT19B
PT19A
PT18B
PT17A
PT16B
PT16A
PT15B
PT15A
PT14B
PT14A
PT13B
PT13A
PT12B
PT12A
PT11B
PT11A
PT10B
DONE
CFG0
CFG1
PT9A
PT8B
PT8A
PT7B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Ball
Bank Diff.
Pinout Information
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LFXP20
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Dual Function
VREF2_0
DQS
DQS
CSN
DI
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-