LFE2M20SE-5FN484C Lattice, LFE2M20SE-5FN484C Datasheet - Page 230

• Manufacturer Part Number: LFE2M20SE-5FN484C
• Description: FPGA - Field Programmable Gate Array 19K LUTs 304 I/O S-Ser SERDES DSP -5
• Manufacturer: Lattice

Specifications of LFE2M20SE-5FN484C

• Number Of Macrocells: 19000
• Maximum Operating Frequency: 311 MHz
• Number Of Programmable I/os: 304
• Data Ram Size: 1246208
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LFE2-70E/SE Logic Signal Connections: 900 fpBGA (Cont.)
Lattice Semiconductor
Ball Number
AA16
AA17
AA18
AA19
AB17
AB18
AA12
AA13
AA14
AB12
AB13
AB14
M21
M22
W21
N21
N22
R21
U21
U22
Y10
Y11
Y12
Y13
Y18
Y19
Y20
K12
K13
K14
K15
K17
K18
K20
V21
V22
Y22
J13
J14
J17
J18
J20
L21
Ball/Pad Function
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO0
VCCIO1
VCCIO1
VCCIO1
VCCIO1
VCCIO1
VCCIO1
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO4
VCCIO4
VCCIO4
VCCIO4
VCCIO4
VCCIO4
VCCIO5
VCCIO5
VCCIO5
VCCIO5
VCCIO5
VCCIO5
VCC
VCC
VCC
VCC
VCC
VCC
VCC
LFE2-70E/SE
Bank
4-127
0
0
0
0
0
0
1
1
1
1
1
1
2
2
2
2
2
2
3
3
3
3
3
3
4
4
4
4
4
4
5
5
5
5
5
5
-
-
-
-
-
-
-
LatticeECP2/M Family Data Sheet
Dual Function
Pinout Information
Differential