LFE2M20SE-5FN484C Lattice, LFE2M20SE-5FN484C Datasheet - Page 327

• Manufacturer Part Number: LFE2M20SE-5FN484C
• Description: FPGA - Field Programmable Gate Array 19K LUTs 304 I/O S-Ser SERDES DSP -5
• Manufacturer: Lattice

Specifications of LFE2M20SE-5FN484C

• Number Of Macrocells: 19000
• Maximum Operating Frequency: 311 MHz
• Number Of Programmable I/os: 304
• Data Ram Size: 1246208
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LFE2M100E/SE Logic Signal Connections: 900 fpBGA (Cont.)
Lattice Semiconductor
Ball Number
AG17
AG25
AG14
AA28
AB25
AE28
AA18
AA19
AE19
AF22
AA12
AA13
AE12
M21
M24
W21
W24
AG6
W10
N21
N28
R25
U21
AF9
AA3
AB6
AE3
U10
K19
F28
K28
P21
T25
V21
V28
V10
J25
W7
V3
K3
T6
F3
J6
Ball/Pad Function
VCCIO1
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO2
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO3
VCCIO4
VCCIO4
VCCIO4
VCCIO4
VCCIO4
VCCIO4
VCCIO5
VCCIO5
VCCIO5
VCCIO5
VCCIO5
VCCIO5
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO7
VCCIO7
VCCIO7
LFE2M100E/SE
Bank
4-224
1
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
7
7
7
LatticeECP2/M Family Data Sheet
Dual Function
Pinout Information
Differential