AFS600-FGG484 Actel, AFS600-FGG484 Datasheet - Page 119

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-FGG484

Manufacturer Part Number
AFS600-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-FGG484

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
172
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AFS600-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AFS600-FGG484
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS600-FGG484I
Manufacturer:
Microsemi SoC
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Part Number:
AFS600-FGG484I
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MICROSEMI/美高森美
Quantity:
20 000
Part Number:
AFS600-FGG484K
Manufacturer:
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Quantity:
10 000
ADC Description
The Actel Fusion ADC is a 12-bit SAR ADC. It offers a wide variety of features for different use models.
Figure 2-81
Figure 2-81 • ADC Simplified Block Diagram
Analog Quads
Signals from
Configurable resolution: 8-bit, 10-bit, and 12-bit mode
DNL: 0.6 LSB for 10-bit mode
INL: 0.4 LSB for 10-bit mode
No missing code
Internal VAREF = 2.56 V
Maximum Sample Rate = 600 Ksps
Power-up calibration and dynamic calibration after every sample to compensate for temperature
drift over time
shows a block diagram of the Fusion ADC.
32
CHNUMBER
SYSCLK
Analog
MUX
R e v i s i o n 1
TVC
STC
VAREF
SAR ADC
Actel Fusion Family of Mixed Signal FPGAs
ADCCLK
STATUS
MODE
12
CALIBRATE
SAMPLE
BUSY
DATAVALID
RESULT
2- 103

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