AFS600-FGG484 Actel, AFS600-FGG484 Datasheet - Page 323

FPGA - Field Programmable Gate Array 600K System Gates

AFS600-FGG484

Manufacturer Part Number
AFS600-FGG484
Description
FPGA - Field Programmable Gate Array 600K System Gates
Manufacturer
Actel
Datasheet

Specifications of AFS600-FGG484

Processor Series
AFS600
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
172
Data Ram Size
110592
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
600 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AFS600-FGG484
Manufacturer:
Actel
Quantity:
135
Part Number:
AFS600-FGG484
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS600-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS600-FGG484I
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
Part Number:
AFS600-FGG484K
Manufacturer:
Microsemi SoC
Quantity:
10 000
Revision
Advance 1.0
(continued)
Advance v0.9
(October 2007)
In
Banks
Banks
Hot-Swap changed to Standard
LVDS changed to Advanced
The
In the notes for
Applicable to Commercial and Industrial
This change table states that in the
v0.8 changes, the AFS090 device had a pin change. That is incorrect. Pin 102 was
updated for AFS250 and AFS600. The function name changed from V
V
In
AFS1500/M7AFS1500 I/O counts were updated for the following devices:
FG484: 223/109
FG676: 252/126
In the
following pin:
B25
In the
following pins:
AFS090: B29
AFS250: B29
In the
following pins:
AFS090: 102
AFS250: 102
In the
following pins:
AFS090: T14
AFS250: T14
AFS600: T14
AFS1500: T14
In the
following pins:
AFS600: AB18
AFS1500: AB18
In the
following pins:
AFS1500: AD20
CC33A
Figure 2-111 • Naming Conventions of Fusion Devices with Three Digital I/O
Figure 2-113 • Timing Model
the
"208-Pin PQFP"
"256-Pin FBGA"
"484-Pin FBGA"
"676-Pin FBGA"
"108-Pin QFN"
"180-Pin QFN"
the following names were changed:
and
.
"Package
Figure 2-112 • Naming Conventions of Fusion Devices with Four I/O
Table 2-86 • Summary of Maximum and Minimum DC Input Levels
table, the function changed from V
table, the function changed from V
table, the function changed from V
table, the function changed from V
table, the function changed from V
table, the function changed from V
I/Os:
was updated.
Single-/Double-Ended
"208-Pin PQFP" table
R e v i s i o n 1
Changes
Conditions, T
J
was changed to T
CC33ACAP
CC33ACAP
CC33ACAP
CC33ACAP
CC33ACAP
CC33ACAP
Actel Fusion Family of Mixed Signal FPGAs
listed under the Advance
(Analog)"
to V
to V
to V
to V
to V
to V
CC33A
CC33A
CC33A
CC33A
CC33A
CC33A
CC33ACAP
table,
A
.
for the
for the
for the
for the
for the
for the
the
to
2-160
2-161
2-166
Page
3-12
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